arch	circuit	script_params	vtr_flow_elapsed_time	vtr_max_mem_stage	vtr_max_mem	error	odin_synth_time	max_odin_mem	parmys_synth_time	max_parmys_mem	abc_depth	abc_synth_time	abc_cec_time	abc_sec_time	max_abc_mem	ace_time	max_ace_mem	num_clb	num_io	num_memories	num_mult	vpr_status	vpr_revision	vpr_build_info	vpr_compiler	vpr_compiled	hostname	rundir	max_vpr_mem	num_primary_inputs	num_primary_outputs	num_pre_packed_nets	num_pre_packed_blocks	num_netlist_clocks	num_post_packed_nets	num_post_packed_blocks	device_width	device_height	device_grid_tiles	device_limiting_resources	device_name	pack_mem	pack_time	initial_placed_wirelength_est	placed_wirelength_est	total_swap	accepted_swap	rejected_swap	aborted_swap	place_mem	place_time	place_quench_time	initial_placed_CPD_est	placed_CPD_est	placed_setup_TNS_est	placed_setup_WNS_est	placed_geomean_nonvirtual_intradomain_critical_path_delay_est	place_delay_matrix_lookup_time	place_quench_timing_analysis_time	place_quench_sta_time	place_total_timing_analysis_time	place_total_sta_time	ap_mem	ap_time	ap_full_legalizer_mem	ap_full_legalizer_time	min_chan_width	routed_wirelength	min_chan_width_route_success_iteration	logic_block_area_total	logic_block_area_used	min_chan_width_routing_area_total	min_chan_width_routing_area_per_tile	min_chan_width_route_time	min_chan_width_total_timing_analysis_time	min_chan_width_total_sta_time	crit_path_num_rr_graph_nodes	crit_path_num_rr_graph_edges	crit_path_collapsed_nodes	crit_path_routed_wirelength	crit_path_route_success_iteration	crit_path_total_nets_routed	crit_path_total_connections_routed	crit_path_total_heap_pushes	crit_path_total_heap_pops	critical_path_delay	geomean_nonvirtual_intradomain_critical_path_delay	setup_TNS	setup_WNS	hold_TNS	hold_WNS	crit_path_routing_area_total	crit_path_routing_area_per_tile	router_lookahead_computation_time	crit_path_route_time	crit_path_create_rr_graph_time	crit_path_create_intra_cluster_rr_graph_time	crit_path_tile_lookahead_computation_time	crit_path_router_lookahead_computation_time	crit_path_total_timing_analysis_time	crit_path_total_sta_time	num_global_nets	num_routed_nets	
timing/k6_N10_40nm.xml	microbenchmarks/d_flip_flop.v	common_-start_odin_--clock_modeling_ideal_--route_chan_width_60	0.27	vpr	58.69 MiB		0.01	6528	-1	-1	1	0.02	-1	-1	29552	-1	-1	1	2	-1	-1	success	v8.0.0-14178-g4818739e3-dirty	release IPO VTR_ASSERT_LEVEL=2	GNU 13.3.0 on Linux-6.8.0-71-generic x86_64	2025-10-15T12:28:24	betzgrp-wintermute	/home/gholam39/vpr/vtr-verilog-to-routing/vtr_flow	60100	2	1	3	4	1	3	4	3	3	9	-1	auto	19.8 MiB	0.00	6	6	9	3	5	1	58.7 MiB	0.00	0.00	0.55447	0.55447	-0.91031	-0.55447	0.55447	0.00	1.0109e-05	6.65e-06	6.9226e-05	5.103e-05	-1	-1	-1	-1	-1	2	4	18000	18000	14049.7	1561.07	0.00	0.00106708	0.00100124	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	1	2	
timing/k6_N10_40nm.xml	microbenchmarks/d_flip_flop.v	common_-start_odin_--clock_modeling_route_--route_chan_width_60	0.26	vpr	58.69 MiB		0.01	6528	-1	-1	1	0.02	-1	-1	29596	-1	-1	1	2	-1	-1	success	v8.0.0-14178-g4818739e3-dirty	release IPO VTR_ASSERT_LEVEL=2	GNU 13.3.0 on Linux-6.8.0-71-generic x86_64	2025-10-15T12:28:24	betzgrp-wintermute	/home/gholam39/vpr/vtr-verilog-to-routing/vtr_flow	60100	2	1	3	4	1	3	4	3	3	9	-1	auto	20.3 MiB	0.00	9	9	9	1	5	3	58.7 MiB	0.00	0.00	0.56425	0.48631	-0.91031	-0.48631	0.48631	0.00	1.0521e-05	6.774e-06	7.44e-05	5.3606e-05	-1	-1	-1	-1	-1	4	3	18000	18000	15707.9	1745.32	0.00	0.00098083	0.000911049	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	0	3	
timing/k6_N10_40nm.xml	verilog/mkPktMerge.v	common_-start_odin_--clock_modeling_ideal_--route_chan_width_60	2.93	vpr	60.84 MiB		0.23	59136	-1	-1	2	0.99	-1	-1	47680	-1	-1	155	5	-1	-1	success	v8.0.0-14178-g4818739e3-dirty	release IPO VTR_ASSERT_LEVEL=2	GNU 13.3.0 on Linux-6.8.0-71-generic x86_64	2025-10-15T12:28:24	betzgrp-wintermute	/home/gholam39/vpr/vtr-verilog-to-routing/vtr_flow	62296	5	156	191	347	1	163	316	15	15	225	clb	auto	21.4 MiB	0.02	118	31	181991	133557	5728	42706	60.8 MiB	0.18	0.00	1.99335	1.49664	-15.0848	-1.49664	1.49664	0.00	0.000239895	0.00022385	0.0434768	0.040395	-1	-1	-1	-1	-1	47	6	3.042e+06	2.79e+06	863192.	3836.41	0.01	0.0489471	0.0454448	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	154	9	
timing/k6_N10_40nm.xml	verilog/mkPktMerge.v	common_-start_odin_--clock_modeling_route_--route_chan_width_60	3.03	vpr	61.21 MiB		0.22	59520	-1	-1	2	1.00	-1	-1	47684	-1	-1	155	5	-1	-1	success	v8.0.0-14178-g4818739e3-dirty	release IPO VTR_ASSERT_LEVEL=2	GNU 13.3.0 on Linux-6.8.0-71-generic x86_64	2025-10-15T12:28:24	betzgrp-wintermute	/home/gholam39/vpr/vtr-verilog-to-routing/vtr_flow	62680	5	156	191	347	1	163	316	15	15	225	clb	auto	21.4 MiB	0.02	126	33	171241	124974	6202	40065	61.2 MiB	0.18	0.00	1.66097	1.47673	-14.6018	-1.47673	1.47673	0.00	0.000238035	0.000220052	0.0450144	0.0416574	-1	-1	-1	-1	-1	63	6	3.042e+06	2.79e+06	892591.	3967.07	0.01	0.0504845	0.0467052	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	153	10	
timing/k6_N10_mem32K_40nm.xml	microbenchmarks/d_flip_flop.v	common_-start_odin_--clock_modeling_ideal_--route_chan_width_60	0.33	vpr	64.32 MiB		0.02	6528	-1	-1	1	0.02	-1	-1	29468	-1	-1	1	2	0	0	success	v8.0.0-14178-g4818739e3-dirty	release IPO VTR_ASSERT_LEVEL=2	GNU 13.3.0 on Linux-6.8.0-71-generic x86_64	2025-10-15T12:28:24	betzgrp-wintermute	/home/gholam39/vpr/vtr-verilog-to-routing/vtr_flow	65860	2	1	3	4	1	3	4	3	3	9	-1	auto	26.1 MiB	0.00	6	6	9	3	5	1	64.3 MiB	0.00	0.00	0.55247	0.55247	-0.90831	-0.55247	0.55247	0.00	9.969e-06	6.483e-06	7.9339e-05	5.8433e-05	-1	-1	-1	-1	-1	2	3	53894	53894	12370.0	1374.45	0.00	0.00105922	0.000984631	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	1	2	
timing/k6_N10_mem32K_40nm.xml	microbenchmarks/d_flip_flop.v	common_-start_odin_--clock_modeling_route_--route_chan_width_60	0.30	vpr	64.32 MiB		0.02	6144	-1	-1	1	0.02	-1	-1	29572	-1	-1	1	2	0	0	success	v8.0.0-14178-g4818739e3-dirty	release IPO VTR_ASSERT_LEVEL=2	GNU 13.3.0 on Linux-6.8.0-71-generic x86_64	2025-10-15T12:28:24	betzgrp-wintermute	/home/gholam39/vpr/vtr-verilog-to-routing/vtr_flow	65864	2	1	3	4	1	3	4	3	3	9	-1	auto	26.1 MiB	0.00	9	9	9	1	5	3	64.3 MiB	0.00	0.00	0.56425	0.48631	-0.90831	-0.48631	0.48631	0.00	1.0338e-05	6.511e-06	7.7119e-05	5.5164e-05	-1	-1	-1	-1	-1	4	2	53894	53894	14028.3	1558.70	0.00	0.00103029	0.000959276	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	0	3	
timing/k6_N10_mem32K_40nm.xml	verilog/mkPktMerge.v	common_-start_odin_--clock_modeling_ideal_--route_chan_width_60	2.67	vpr	71.98 MiB		0.10	16896	-1	-1	2	0.10	-1	-1	32992	-1	-1	43	311	15	0	success	v8.0.0-14178-g4818739e3-dirty	release IPO VTR_ASSERT_LEVEL=2	GNU 13.3.0 on Linux-6.8.0-71-generic x86_64	2025-10-15T12:28:24	betzgrp-wintermute	/home/gholam39/vpr/vtr-verilog-to-routing/vtr_flow	73704	311	156	972	1128	1	953	525	28	28	784	memory	auto	32.7 MiB	0.31	19535.2	8434	243980	106344	133931	3705	72.0 MiB	0.85	0.01	4.8206	3.97422	-4388.16	-3.97422	3.97422	0.00	0.00310432	0.00257968	0.363654	0.310966	-1	-1	-1	-1	-1	12286	12	4.25198e+07	1.05374e+07	2.96205e+06	3778.13	0.21	0.469663	0.407651	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	15	938	
timing/k6_N10_mem32K_40nm.xml	verilog/mkPktMerge.v	common_-start_odin_--clock_modeling_route_--route_chan_width_60	2.64	vpr	71.97 MiB		0.09	16128	-1	-1	2	0.10	-1	-1	33520	-1	-1	43	311	15	0	success	v8.0.0-14178-g4818739e3-dirty	release IPO VTR_ASSERT_LEVEL=2	GNU 13.3.0 on Linux-6.8.0-71-generic x86_64	2025-10-15T12:28:24	betzgrp-wintermute	/home/gholam39/vpr/vtr-verilog-to-routing/vtr_flow	73700	311	156	972	1128	1	953	525	28	28	784	memory	auto	32.8 MiB	0.31	19711.2	8697	241863	108484	130483	2896	72.0 MiB	0.83	0.01	4.71974	3.98529	-4050.55	-3.98529	3.98529	0.00	0.00300372	0.00249721	0.353472	0.30365	-1	-1	-1	-1	-1	12542	12	4.25198e+07	1.05374e+07	3.02951e+06	3864.17	0.22	0.459277	0.400206	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	14	939	
