 arch	  circuit	  script_params	  vtr_flow_elapsed_time	  vtr_max_mem_stage	  vtr_max_mem	  error	  odin_synth_time	  max_odin_mem	  parmys_synth_time	  max_parmys_mem	  abc_depth	  abc_synth_time	  abc_cec_time	  abc_sec_time	  max_abc_mem	  ace_time	  max_ace_mem	  num_clb	  num_io	  num_memories	  num_mult	  vpr_status	  vpr_revision	  vpr_build_info	  vpr_compiler	  vpr_compiled	  hostname	  rundir	  max_vpr_mem	  num_primary_inputs	  num_primary_outputs	  num_pre_packed_nets	  num_pre_packed_blocks	  num_netlist_clocks	  num_post_packed_nets	  num_post_packed_blocks	  device_width	  device_height	  device_grid_tiles	  device_limiting_resources	  device_name	  pack_mem	  pack_time	  initial_placed_wirelength_est	  placed_wirelength_est	  total_swap	  accepted_swap	  rejected_swap	  aborted_swap	  place_mem	  place_time	  place_quench_time	  initial_placed_CPD_est	  placed_CPD_est	  placed_setup_TNS_est	  placed_setup_WNS_est	  placed_geomean_nonvirtual_intradomain_critical_path_delay_est	  place_delay_matrix_lookup_time	  place_quench_timing_analysis_time	  place_quench_sta_time	  place_total_timing_analysis_time	  place_total_sta_time	  ap_mem	  ap_time	  ap_full_legalizer_mem	  ap_full_legalizer_time	  min_chan_width	  routed_wirelength	  min_chan_width_route_success_iteration	  logic_block_area_total	  logic_block_area_used	  min_chan_width_routing_area_total	  min_chan_width_routing_area_per_tile	  min_chan_width_route_time	  min_chan_width_total_timing_analysis_time	  min_chan_width_total_sta_time	  crit_path_num_rr_graph_nodes	  crit_path_num_rr_graph_edges	  crit_path_collapsed_nodes	  crit_path_routed_wirelength	  crit_path_route_success_iteration	  crit_path_total_nets_routed	  crit_path_total_connections_routed	  crit_path_total_heap_pushes	  crit_path_total_heap_pops	  critical_path_delay	  geomean_nonvirtual_intradomain_critical_path_delay	  setup_TNS	  setup_WNS	  hold_TNS	  hold_WNS	  crit_path_routing_area_total	  crit_path_routing_area_per_tile	  router_lookahead_computation_time	  crit_path_route_time	  crit_path_create_rr_graph_time	  crit_path_create_intra_cluster_rr_graph_time	  crit_path_tile_lookahead_computation_time	  crit_path_router_lookahead_computation_time	  crit_path_total_timing_analysis_time	  crit_path_total_sta_time	 
 k6_frac_N10_frac_chain_mem32K_40nm.xml	  multiclock.blif	  common_--timing_report_detail_netlist	  0.33	  vpr	  67.96 MiB	  	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  2	  5	  0	  0	  success	  v8.0.0-14013-ge1496c441d	  release VTR_ASSERT_LEVEL=3	  GNU 13.3.0 on Linux-6.8.0-63-generic x86_64	  2025-10-06T15:12:57	  srivatsan-Precision-Tower-5810	  /home/alex/vtr-verilog-to-routing/vtr_flow/tasks/regression_tests/vtr_reg_strong	  69592	  5	  3	  11	  14	  2	  9	  10	  4	  4	  16	  clb	  auto	  29.6 MiB	  0.00	  24	  20	  470	  157	  233	  80	  68.0 MiB	  0.00	  0.00	  0.713166	  0.620297	  -3.41517	  -0.620297	  0.545	  0.01	  3.2808e-05	  2.6212e-05	  0.00175644	  0.00136172	  -1	  -1	  -1	  -1	  20	  24	  1	  107788	  107788	  10441.3	  652.579	  0.01	  0.00278199	  0.00229402	  750	  1675	  -1	  26	  3	  10	  10	  347	  239	  0.869227	  0.545	  -4.0122	  -0.869227	  0	  0	  13752.8	  859.551	  0.00	  0.00	  0.00	  -1	  -1	  0.00	  0.00104282	  0.000958535	 
 k6_frac_N10_frac_chain_mem32K_40nm.xml	  multiclock.blif	  common_--timing_report_detail_aggregated	  0.33	  vpr	  68.21 MiB	  	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  2	  5	  0	  0	  success	  v8.0.0-14013-ge1496c441d	  release VTR_ASSERT_LEVEL=3	  GNU 13.3.0 on Linux-6.8.0-63-generic x86_64	  2025-10-06T15:12:57	  srivatsan-Precision-Tower-5810	  /home/alex/vtr-verilog-to-routing/vtr_flow/tasks/regression_tests/vtr_reg_strong	  69848	  5	  3	  11	  14	  2	  9	  10	  4	  4	  16	  clb	  auto	  29.8 MiB	  0.00	  24	  20	  470	  157	  233	  80	  68.2 MiB	  0.01	  0.00	  0.713166	  0.620297	  -3.41517	  -0.620297	  0.545	  0.01	  4.8178e-05	  3.7477e-05	  0.00194215	  0.00145639	  -1	  -1	  -1	  -1	  20	  24	  1	  107788	  107788	  10441.3	  652.579	  0.01	  0.002929	  0.002353	  750	  1675	  -1	  26	  3	  10	  10	  347	  239	  0.869227	  0.545	  -4.0122	  -0.869227	  0	  0	  13752.8	  859.551	  0.00	  0.00	  0.00	  -1	  -1	  0.00	  0.00101005	  0.000927011	 
 k6_frac_N10_frac_chain_mem32K_40nm.xml	  multiclock.blif	  common_--timing_report_detail_detailed	  0.36	  vpr	  68.01 MiB	  	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  2	  5	  0	  0	  success	  v8.0.0-14013-ge1496c441d	  release VTR_ASSERT_LEVEL=3	  GNU 13.3.0 on Linux-6.8.0-63-generic x86_64	  2025-10-06T15:12:57	  srivatsan-Precision-Tower-5810	  /home/alex/vtr-verilog-to-routing/vtr_flow/tasks/regression_tests/vtr_reg_strong	  69644	  5	  3	  11	  14	  2	  9	  10	  4	  4	  16	  clb	  auto	  29.7 MiB	  0.01	  24	  20	  470	  157	  233	  80	  68.0 MiB	  0.01	  0.00	  0.713166	  0.620297	  -3.41517	  -0.620297	  0.545	  0.01	  3.3761e-05	  2.6832e-05	  0.00187696	  0.00145854	  -1	  -1	  -1	  -1	  20	  24	  1	  107788	  107788	  10441.3	  652.579	  0.01	  0.00311327	  0.00259666	  750	  1675	  -1	  26	  3	  10	  10	  347	  239	  0.869227	  0.545	  -4.0122	  -0.869227	  0	  0	  13752.8	  859.551	  0.00	  0.00	  0.00	  -1	  -1	  0.00	  0.00109409	  0.00100261	 
 k6_frac_N10_frac_chain_mem32K_40nm.xml	  multiclock.blif	  common_--timing_report_detail_netlist_--flat_routing_on	  0.85	  vpr	  73.71 MiB	  	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  2	  5	  0	  0	  success	  v8.0.0-14013-ge1496c441d	  release VTR_ASSERT_LEVEL=3	  GNU 13.3.0 on Linux-6.8.0-63-generic x86_64	  2025-10-06T15:12:57	  srivatsan-Precision-Tower-5810	  /home/alex/vtr-verilog-to-routing/vtr_flow/tasks/regression_tests/vtr_reg_strong	  75476	  5	  3	  11	  14	  2	  9	  10	  4	  4	  16	  clb	  auto	  34.1 MiB	  0.01	  24	  20	  470	  157	  233	  80	  73.7 MiB	  0.01	  0.00	  0.713166	  0.620297	  -3.41517	  -0.620297	  0.545	  0.01	  2.4647e-05	  1.8997e-05	  0.00147348	  0.00109713	  -1	  -1	  -1	  -1	  20	  25	  2	  107788	  107788	  13586.0	  849.124	  0.29	  0.00253124	  0.00204256	  858	  2299	  78	  26	  3	  14	  18	  543	  310	  0.826797	  0.545	  -4.0122	  -0.826797	  0	  0	  18030.6	  1126.91	  0.00	  0.14	  0.00	  0.00	  0.13	  0.00	  0.00108912	  0.000973002	 
 k6_frac_N10_frac_chain_mem32K_40nm.xml	  multiclock.blif	  common_--timing_report_detail_aggregated_--flat_routing_on	  0.83	  vpr	  73.63 MiB	  	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  2	  5	  0	  0	  success	  v8.0.0-14013-ge1496c441d	  release VTR_ASSERT_LEVEL=3	  GNU 13.3.0 on Linux-6.8.0-63-generic x86_64	  2025-10-06T15:12:57	  srivatsan-Precision-Tower-5810	  /home/alex/vtr-verilog-to-routing/vtr_flow/tasks/regression_tests/vtr_reg_strong	  75400	  5	  3	  11	  14	  2	  9	  10	  4	  4	  16	  clb	  auto	  34.2 MiB	  0.01	  24	  20	  470	  157	  233	  80	  73.6 MiB	  0.01	  0.00	  0.713166	  0.620297	  -3.41517	  -0.620297	  0.545	  0.01	  3.3159e-05	  2.6445e-05	  0.0018292	  0.00140916	  -1	  -1	  -1	  -1	  20	  25	  2	  107788	  107788	  13586.0	  849.124	  0.29	  0.00301154	  0.00246893	  858	  2299	  78	  26	  3	  14	  18	  543	  310	  0.826797	  0.545	  -4.0122	  -0.826797	  0	  0	  18030.6	  1126.91	  0.00	  0.14	  0.00	  0.00	  0.13	  0.00	  0.000985226	  0.000893761	 
 k6_frac_N10_frac_chain_mem32K_40nm.xml	  multiclock.blif	  common_--timing_report_detail_detailed_--flat_routing_on	  0.85	  vpr	  73.75 MiB	  	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  2	  5	  0	  0	  success	  v8.0.0-14013-ge1496c441d	  release VTR_ASSERT_LEVEL=3	  GNU 13.3.0 on Linux-6.8.0-63-generic x86_64	  2025-10-06T15:12:57	  srivatsan-Precision-Tower-5810	  /home/alex/vtr-verilog-to-routing/vtr_flow/tasks/regression_tests/vtr_reg_strong	  75524	  5	  3	  11	  14	  2	  9	  10	  4	  4	  16	  clb	  auto	  34.3 MiB	  0.01	  24	  20	  470	  157	  233	  80	  73.8 MiB	  0.01	  0.00	  0.713166	  0.620297	  -3.41517	  -0.620297	  0.545	  0.01	  3.3928e-05	  2.7101e-05	  0.00185424	  0.00143199	  -1	  -1	  -1	  -1	  20	  25	  2	  107788	  107788	  13586.0	  849.124	  0.28	  0.00293834	  0.00240114	  858	  2299	  78	  26	  3	  14	  18	  543	  310	  0.826797	  0.545	  -4.0122	  -0.826797	  0	  0	  18030.6	  1126.91	  0.00	  0.14	  0.00	  0.00	  0.13	  0.00	  0.00132602	  0.00123387	 
