arch	circuit	script_params	vtr_flow_elapsed_time	vtr_max_mem_stage	vtr_max_mem	error	odin_synth_time	max_odin_mem	parmys_synth_time	max_parmys_mem	abc_depth	abc_synth_time	abc_cec_time	abc_sec_time	max_abc_mem	ace_time	max_ace_mem	num_clb	num_io	num_memories	num_mult	vpr_status	vpr_revision	vpr_build_info	vpr_compiler	vpr_compiled	hostname	rundir	max_vpr_mem	num_primary_inputs	num_primary_outputs	num_pre_packed_nets	num_pre_packed_blocks	num_netlist_clocks	num_post_packed_nets	num_post_packed_blocks	device_width	device_height	device_grid_tiles	device_limiting_resources	device_name	pack_mem	pack_time	initial_placed_wirelength_est	placed_wirelength_est	total_swap	accepted_swap	rejected_swap	aborted_swap	place_mem	place_time	place_quench_time	initial_placed_CPD_est	placed_CPD_est	placed_setup_TNS_est	placed_setup_WNS_est	placed_geomean_nonvirtual_intradomain_critical_path_delay_est	place_delay_matrix_lookup_time	place_quench_timing_analysis_time	place_quench_sta_time	place_total_timing_analysis_time	place_total_sta_time	ap_mem	ap_time	ap_full_legalizer_mem	ap_full_legalizer_time	routed_wirelength	avg_routed_wirelength	routed_wiresegment	avg_routed_wiresegment	total_nets_routed	total_connections_routed	total_heap_pushes	total_heap_pops	logic_block_area_total	logic_block_area_used	routing_area_total	routing_area_per_tile	crit_path_route_success_iteration	num_rr_graph_nodes	num_rr_graph_edges	collapsed_nodes	critical_path_delay	geomean_nonvirtual_intradomain_critical_path_delay	setup_TNS	setup_WNS	hold_TNS	hold_WNS	create_rr_graph_time	create_intra_cluster_rr_graph_time	adding_internal_edges	route_mem	crit_path_route_time	crit_path_total_timing_analysis_time	crit_path_total_sta_time	router_lookahead_mem	tile_lookahead_computation_time	router_lookahead_computation_time	
3d_k4_N4_90nm_opin_per_side.xml	s820.blif	common	0.60	vpr	61.18 MiB		-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	34	19	-1	-1	success	v8.0.0-14952-g4ccc8467c-dirty	release VTR_ASSERT_LEVEL=2	GNU 11.4.0 on Linux-6.8.0-60-generic x86_64	2026-01-16T17:06:36	soheil-pt372	/home/soheil/vtr/vtr-verilog-to-routing/vtr_flow	62648	19	19	142	161	1	97	72	10	10	200	-1	FPGA3D	21.7 MiB	0.02	962.95	689	10055	3272	4303	2480	61.2 MiB	0.05	0.00	3.88023	2.95555	-46.0763	-2.95555	2.95555	0.00	0.000240353	0.000208679	0.0180349	0.0158608	-1	-1	-1	-1	797	8.30208	797	8.30208	450	1386	367542	154279	142676	75796.9	1.73296e+06	8664.79	11	40248	404800	-1	3.14082	3.14082	-51.6258	-3.14082	0	0	0.32	-1	-1	61.2 MiB	0.06	0.0273175	0.0242775	61.2 MiB	-1	0.03	
3d_k4_N4_90nm_opin_per_side.xml	s838.1.blif	common	0.50	vpr	61.45 MiB		-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	31	35	-1	-1	success	v8.0.0-14952-g4ccc8467c-dirty	release VTR_ASSERT_LEVEL=2	GNU 11.4.0 on Linux-6.8.0-60-generic x86_64	2026-01-16T17:06:36	soheil-pt372	/home/soheil/vtr/vtr-verilog-to-routing/vtr_flow	62928	35	1	162	163	1	108	67	10	10	200	-1	FPGA3D	21.9 MiB	0.02	971.993	585	8363	2579	3793	1991	61.5 MiB	0.04	0.00	6.15122	4.74505	-94.0577	-4.74505	4.74505	0.00	0.000261003	0.000222323	0.0156294	0.0137867	-1	-1	-1	-1	602	5.62617	602	5.62617	410	840	149044	50126	142676	69108.9	1.73296e+06	8664.79	8	40248	404800	-1	4.85422	4.85422	-96.2506	-4.85422	0	0	0.28	-1	-1	61.5 MiB	0.03	0.0224925	0.0200588	61.5 MiB	-1	0.03	
3d_k4_N4_90nm_opin_per_side.xml	bw.blif	common	0.56	vpr	61.44 MiB		-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	37	5	-1	-1	success	v8.0.0-14952-g4ccc8467c-dirty	release VTR_ASSERT_LEVEL=2	GNU 11.4.0 on Linux-6.8.0-60-generic x86_64	2026-01-16T17:06:36	soheil-pt372	/home/soheil/vtr/vtr-verilog-to-routing/vtr_flow	62916	5	28	137	165	0	95	70	10	10	200	-1	FPGA3D	22.1 MiB	0.02	1001.19	649	9286	3155	3479	2652	61.4 MiB	0.04	0.00	4.70726	2.65771	-58.9591	-2.65771	nan	0.00	0.000246113	0.000210342	0.016976	0.0148463	-1	-1	-1	-1	679	7.14737	679	7.14737	415	1043	287220	119956	142676	82484.8	1.73296e+06	8664.79	14	40248	404800	-1	3.10359	nan	-68.255	-3.10359	0	0	0.31	-1	-1	61.4 MiB	0.05	0.0271635	0.024014	61.4 MiB	-1	0.03	
3d_k4_N4_90nm_opin_per_side.xml	rd84.blif	common	0.56	vpr	61.59 MiB		-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	48	8	-1	-1	success	v8.0.0-14952-g4ccc8467c-dirty	release VTR_ASSERT_LEVEL=2	GNU 11.4.0 on Linux-6.8.0-60-generic x86_64	2026-01-16T17:06:36	soheil-pt372	/home/soheil/vtr/vtr-verilog-to-routing/vtr_flow	63068	8	4	165	169	0	122	60	10	10	200	-1	FPGA3D	22.1 MiB	0.02	1276.53	926	8835	3386	4263	1186	61.6 MiB	0.06	0.00	5.86296	3.79992	-12.1677	-3.79992	nan	0.00	0.000280404	0.000243373	0.0222089	0.0194383	-1	-1	-1	-1	1052	8.62295	1052	8.62295	641	1923	304725	99409	142676	107007	1.73296e+06	8664.79	9	40248	404800	-1	4.30823	nan	-13.7554	-4.30823	0	0	0.29	-1	-1	61.6 MiB	0.05	0.0311781	0.0276442	61.6 MiB	-1	0.03	
3d_k4_N4_90nm_opin_per_side.xml	s832.blif	common	0.57	vpr	61.43 MiB		-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	40	19	-1	-1	success	v8.0.0-14952-g4ccc8467c-dirty	release VTR_ASSERT_LEVEL=2	GNU 11.4.0 on Linux-6.8.0-60-generic x86_64	2026-01-16T17:06:36	soheil-pt372	/home/soheil/vtr/vtr-verilog-to-routing/vtr_flow	62904	19	19	167	186	1	115	78	10	10	200	-1	FPGA3D	22.1 MiB	0.02	1154.25	796	11366	3474	4906	2986	61.4 MiB	0.06	0.00	4.13252	3.09567	-46.2728	-3.09567	3.09567	0.00	0.000295379	0.000248479	0.0205534	0.0180766	-1	-1	-1	-1	881	7.72807	881	7.72807	521	1519	411922	163926	142676	89172.8	1.73296e+06	8664.79	14	40248	404800	-1	3.33938	3.33938	-52.7361	-3.33938	0	0	0.29	-1	-1	61.4 MiB	0.06	0.0313511	0.0278296	61.4 MiB	-1	0.03	
3d_k4_N4_90nm_opin_per_side.xml	mm9a.blif	common	0.61	vpr	61.63 MiB		-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	43	13	-1	-1	success	v8.0.0-14952-g4ccc8467c-dirty	release VTR_ASSERT_LEVEL=2	GNU 11.4.0 on Linux-6.8.0-60-generic x86_64	2026-01-16T17:06:36	soheil-pt372	/home/soheil/vtr/vtr-verilog-to-routing/vtr_flow	63108	13	9	182	191	1	116	65	10	10	200	-1	FPGA3D	22.2 MiB	0.03	1114.43	777	6565	1619	3679	1267	61.6 MiB	0.05	0.00	10.8411	8.40163	-156.802	-8.40163	8.40163	0.00	0.000293688	0.000256655	0.0176649	0.0155248	-1	-1	-1	-1	911	7.92174	911	7.92174	607	1941	362282	129217	142676	95860.8	1.73296e+06	8664.79	11	40248	404800	-1	9.27949	9.27949	-165.684	-9.27949	0	0	0.32	-1	-1	61.6 MiB	0.06	0.0283388	0.0252672	61.6 MiB	-1	0.03	
3d_k4_N4_90nm_opin_per_side.xml	alu2.blif	common	0.61	vpr	61.96 MiB		-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	59	10	-1	-1	success	v8.0.0-14952-g4ccc8467c-dirty	release VTR_ASSERT_LEVEL=2	GNU 11.4.0 on Linux-6.8.0-60-generic x86_64	2026-01-16T17:06:36	soheil-pt372	/home/soheil/vtr/vtr-verilog-to-routing/vtr_flow	63452	10	6	207	213	0	147	75	10	10	200	-1	FPGA3D	22.3 MiB	0.03	1523.56	1085	8765	2230	4758	1777	62.0 MiB	0.06	0.00	8.05473	5.89615	-19.1465	-5.89615	nan	0.00	0.0003212	0.000278433	0.0214465	0.0187863	-1	-1	-1	-1	1274	8.66667	1274	8.66667	850	2595	406917	139549	142676	131530	1.73296e+06	8664.79	12	40248	404800	-1	6.38503	nan	-21.5908	-6.38503	0	0	0.30	-1	-1	62.0 MiB	0.07	0.0345042	0.0306781	62.0 MiB	-1	0.03	
3d_k4_N4_90nm_opin_per_side.xml	x1.blif	common	0.69	vpr	61.40 MiB		-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	40	51	-1	-1	success	v8.0.0-14952-g4ccc8467c-dirty	release VTR_ASSERT_LEVEL=2	GNU 11.4.0 on Linux-6.8.0-60-generic x86_64	2026-01-16T17:06:36	soheil-pt372	/home/soheil/vtr/vtr-verilog-to-routing/vtr_flow	62876	51	35	187	222	0	146	126	10	10	200	-1	FPGA3D	21.9 MiB	0.02	1610.1	1063	34146	15873	6729	11544	61.4 MiB	0.12	0.00	3.91077	2.26254	-53.0272	-2.26254	nan	0.00	0.000303535	0.00026405	0.0336432	0.0295447	-1	-1	-1	-1	1128	7.72603	1128	7.72603	704	2104	563143	202814	142676	89172.8	1.73296e+06	8664.79	12	40248	404800	-1	2.80293	nan	-62.7582	-2.80293	0	0	0.31	-1	-1	61.4 MiB	0.08	0.0441106	0.0390982	61.4 MiB	-1	0.03	
3d_k4_N4_90nm_opin_per_side.xml	t481.blif	common	0.70	vpr	61.82 MiB		-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	55	16	-1	-1	success	v8.0.0-14952-g4ccc8467c-dirty	release VTR_ASSERT_LEVEL=2	GNU 11.4.0 on Linux-6.8.0-60-generic x86_64	2026-01-16T17:06:36	soheil-pt372	/home/soheil/vtr/vtr-verilog-to-routing/vtr_flow	63300	16	1	230	231	0	164	72	10	10	200	-1	FPGA3D	22.4 MiB	0.08	1751.01	1329	8118	2127	4769	1222	61.8 MiB	0.06	0.00	6.74864	4.41279	-4.41279	-4.41279	nan	0.00	0.000342451	0.000295126	0.0208033	0.0181691	-1	-1	-1	-1	1792	10.9268	1792	10.9268	1089	4064	759179	253120	142676	122613	1.73296e+06	8664.79	14	40248	404800	-1	5.23329	nan	-5.23329	-5.23329	0	0	0.29	-1	-1	61.8 MiB	0.11	0.0360398	0.0319181	61.8 MiB	-1	0.03	
3d_k4_N4_90nm_opin_per_side.xml	mm9b.blif	common	0.70	vpr	61.58 MiB		-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	63	13	-1	-1	success	v8.0.0-14952-g4ccc8467c-dirty	release VTR_ASSERT_LEVEL=2	GNU 11.4.0 on Linux-6.8.0-60-generic x86_64	2026-01-16T17:06:36	soheil-pt372	/home/soheil/vtr/vtr-verilog-to-routing/vtr_flow	63060	13	9	243	252	1	172	85	10	10	200	-1	FPGA3D	22.6 MiB	0.06	1743.55	1310	12175	3846	6542	1787	61.6 MiB	0.09	0.00	13.1313	10.0021	-204.146	-10.0021	10.0021	0.00	0.000508711	0.000461736	0.0293758	0.0259403	-1	-1	-1	-1	1496	8.74854	1496	8.74854	872	2751	455851	164461	142676	140447	1.73296e+06	8664.79	12	40248	404800	-1	10.6501	10.6501	-211.98	-10.6501	0	0	0.31	-1	-1	61.6 MiB	0.07	0.0440562	0.0393248	61.6 MiB	-1	0.03	
3d_k4_N4_90nm_opin_per_side.xml	styr.blif	common	0.69	vpr	61.80 MiB		-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	60	10	-1	-1	success	v8.0.0-14952-g4ccc8467c-dirty	release VTR_ASSERT_LEVEL=2	GNU 11.4.0 on Linux-6.8.0-60-generic x86_64	2026-01-16T17:06:36	soheil-pt372	/home/soheil/vtr/vtr-verilog-to-routing/vtr_flow	63280	10	10	253	263	1	148	80	10	10	200	-1	FPGA3D	22.9 MiB	0.07	1496.19	1119	11604	3864	6145	1595	61.8 MiB	0.08	0.00	4.75934	3.11196	-38.173	-3.11196	3.11196	0.00	0.000389984	0.000335335	0.0304569	0.0262563	-1	-1	-1	-1	1490	10.1361	1490	10.1361	765	2914	562863	183800	142676	133759	1.73296e+06	8664.79	12	40248	404800	-1	3.48948	3.48948	-41.9949	-3.48948	0	0	0.29	-1	-1	61.8 MiB	0.08	0.0464372	0.0408221	61.8 MiB	-1	0.03	
3d_k4_N4_90nm_opin_per_side.xml	s953.blif	common	0.70	vpr	62.56 MiB		-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	63	17	-1	-1	success	v8.0.0-14952-g4ccc8467c-dirty	release VTR_ASSERT_LEVEL=2	GNU 11.4.0 on Linux-6.8.0-60-generic x86_64	2026-01-16T17:06:36	soheil-pt372	/home/soheil/vtr/vtr-verilog-to-routing/vtr_flow	64060	17	23	260	283	1	175	103	10	10	200	-1	FPGA3D	22.8 MiB	0.04	1841.7	1392	16491	5123	7328	4040	62.6 MiB	0.09	0.00	4.71311	3.10986	-82.4709	-3.10986	3.10986	0.00	0.00041627	0.000358317	0.0296665	0.0256845	-1	-1	-1	-1	1695	9.74138	1695	9.74138	936	3242	753969	274292	142676	140447	1.73296e+06	8664.79	12	40248	404800	-1	3.30706	3.30706	-90.475	-3.30706	0	0	0.30	-1	-1	62.6 MiB	0.11	0.0441732	0.0388795	62.6 MiB	-1	0.03	
3d_k4_N4_90nm_opin_per_block.xml	s820.blif	common	0.69	vpr	61.31 MiB		-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	34	19	-1	-1	success	v8.0.0-14952-g4ccc8467c-dirty	release VTR_ASSERT_LEVEL=2	GNU 11.4.0 on Linux-6.8.0-60-generic x86_64	2026-01-16T17:06:36	soheil-pt372	/home/soheil/vtr/vtr-verilog-to-routing/vtr_flow	62780	19	19	142	161	1	97	72	11	11	242	-1	FPGA3D	21.9 MiB	0.02	1016.99	648	10949	3948	4412	2589	61.3 MiB	0.05	0.00	3.92163	2.86897	-45.4327	-2.86897	2.86897	0.00	0.000241707	0.000211272	0.0186491	0.0164275	-1	-1	-1	-1	741	7.71875	741	7.71875	441	1380	320551	90778	180575	75796.9	2.31172e+06	9552.56	11	50034	555773	-1	3.111	3.111	-49.4713	-3.111	0	0	0.42	-1	-1	61.3 MiB	0.04	0.0267804	0.0237949	61.3 MiB	-1	0.05	
3d_k4_N4_90nm_opin_per_block.xml	s838.1.blif	common	0.65	vpr	61.20 MiB		-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	31	35	-1	-1	success	v8.0.0-14952-g4ccc8467c-dirty	release VTR_ASSERT_LEVEL=2	GNU 11.4.0 on Linux-6.8.0-60-generic x86_64	2026-01-16T17:06:36	soheil-pt372	/home/soheil/vtr/vtr-verilog-to-routing/vtr_flow	62668	35	1	162	163	1	108	67	11	11	242	-1	FPGA3D	21.8 MiB	0.01	853.502	593	5643	882	3037	1724	61.2 MiB	0.03	0.00	6.88936	5.00833	-100.238	-5.00833	5.00833	0.00	0.000231535	0.000205724	0.0108369	0.00955865	-1	-1	-1	-1	638	5.96262	638	5.96262	406	821	161451	45398	180575	69108.9	2.31172e+06	9552.56	7	50034	555773	-1	5.35374	5.35374	-104.879	-5.35374	0	0	0.42	-1	-1	61.2 MiB	0.03	0.0175564	0.0156831	61.2 MiB	-1	0.05	
3d_k4_N4_90nm_opin_per_block.xml	bw.blif	common	0.68	vpr	61.30 MiB		-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	37	5	-1	-1	success	v8.0.0-14952-g4ccc8467c-dirty	release VTR_ASSERT_LEVEL=2	GNU 11.4.0 on Linux-6.8.0-60-generic x86_64	2026-01-16T17:06:36	soheil-pt372	/home/soheil/vtr/vtr-verilog-to-routing/vtr_flow	62776	5	28	137	165	0	95	70	11	11	242	-1	FPGA3D	21.8 MiB	0.02	997.288	658	8710	2613	3426	2671	61.3 MiB	0.04	0.00	4.64491	2.82478	-61.9434	-2.82478	nan	0.00	0.000236283	0.000201386	0.015769	0.0137746	-1	-1	-1	-1	752	7.91579	752	7.91579	458	1171	296343	90256	180575	82484.8	2.31172e+06	9552.56	10	50034	555773	-1	3.29091	nan	-69.5786	-3.29091	0	0	0.41	-1	-1	61.3 MiB	0.04	0.0241066	0.0213455	61.3 MiB	-1	0.05	
3d_k4_N4_90nm_opin_per_block.xml	rd84.blif	common	0.80	vpr	61.56 MiB		-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	48	8	-1	-1	success	v8.0.0-14952-g4ccc8467c-dirty	release VTR_ASSERT_LEVEL=2	GNU 11.4.0 on Linux-6.8.0-60-generic x86_64	2026-01-16T17:06:36	soheil-pt372	/home/soheil/vtr/vtr-verilog-to-routing/vtr_flow	63036	8	4	165	169	0	122	60	11	11	242	-1	FPGA3D	22.2 MiB	0.03	1350.1	896	8601	3176	4241	1184	61.6 MiB	0.06	0.00	5.33088	3.78281	-12.4336	-3.78281	nan	0.00	0.000277768	0.000240828	0.0218982	0.0190943	-1	-1	-1	-1	1109	9.09016	1109	9.09016	658	1975	543615	159391	180575	107007	2.31172e+06	9552.56	11	50034	555773	-1	4.12091	nan	-13.693	-4.12091	0	0	0.45	-1	-1	61.6 MiB	0.07	0.0326356	0.0288775	61.6 MiB	-1	0.05	
3d_k4_N4_90nm_opin_per_block.xml	s832.blif	common	0.80	vpr	61.21 MiB		-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	40	19	-1	-1	success	v8.0.0-14952-g4ccc8467c-dirty	release VTR_ASSERT_LEVEL=2	GNU 11.4.0 on Linux-6.8.0-60-generic x86_64	2026-01-16T17:06:36	soheil-pt372	/home/soheil/vtr/vtr-verilog-to-routing/vtr_flow	62684	19	19	167	186	1	115	78	11	11	242	-1	FPGA3D	21.8 MiB	0.02	1174.09	752	10370	3028	4661	2681	61.2 MiB	0.06	0.00	4.20405	2.94702	-47.3595	-2.94702	2.94702	0.00	0.000531509	0.000411499	0.0193853	0.01692	-1	-1	-1	-1	860	7.54386	860	7.54386	522	1599	352667	98716	180575	89172.8	2.31172e+06	9552.56	10	50034	555773	-1	3.2145	3.2145	-50.3198	-3.2145	0	0	0.47	-1	-1	61.2 MiB	0.07	0.0315957	0.0280802	61.2 MiB	-1	0.05	
3d_k4_N4_90nm_opin_per_block.xml	mm9a.blif	common	1.06	vpr	61.63 MiB		-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	43	13	-1	-1	success	v8.0.0-14952-g4ccc8467c-dirty	release VTR_ASSERT_LEVEL=2	GNU 11.4.0 on Linux-6.8.0-60-generic x86_64	2026-01-16T17:06:36	soheil-pt372	/home/soheil/vtr/vtr-verilog-to-routing/vtr_flow	63108	13	9	182	191	1	116	65	11	11	242	-1	FPGA3D	22.2 MiB	0.04	1273.57	765	5785	1241	3415	1129	61.6 MiB	0.05	0.00	11.6801	8.59482	-155.178	-8.59482	8.59482	0.00	0.000585268	0.00050291	0.0184501	0.016196	-1	-1	-1	-1	949	8.25217	949	8.25217	572	1760	345191	109681	180575	95860.8	2.31172e+06	9552.56	11	50034	555773	-1	9.40437	9.40437	-168.182	-9.40437	0	0	0.67	-1	-1	61.6 MiB	0.09	0.0363561	0.0324336	61.6 MiB	-1	0.05	
3d_k4_N4_90nm_opin_per_block.xml	alu2.blif	common	0.91	vpr	61.99 MiB		-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	59	10	-1	-1	success	v8.0.0-14952-g4ccc8467c-dirty	release VTR_ASSERT_LEVEL=2	GNU 11.4.0 on Linux-6.8.0-60-generic x86_64	2026-01-16T17:06:36	soheil-pt372	/home/soheil/vtr/vtr-verilog-to-routing/vtr_flow	63480	10	6	207	213	0	147	75	11	11	242	-1	FPGA3D	22.3 MiB	0.03	1617.22	1125	8923	2266	4903	1754	62.0 MiB	0.08	0.00	8.82435	5.86298	-20.496	-5.86298	nan	0.00	0.000405701	0.00036003	0.0295435	0.025985	-1	-1	-1	-1	1287	8.75510	1287	8.75510	814	2436	458166	109481	180575	131530	2.31172e+06	9552.56	11	50034	555773	-1	6.19771	nan	-21.1537	-6.19771	0	0	0.52	-1	-1	62.0 MiB	0.09	0.0465124	0.041459	62.0 MiB	-1	0.06	
3d_k4_N4_90nm_opin_per_block.xml	x1.blif	common	1.25	vpr	61.46 MiB		-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	40	51	-1	-1	success	v8.0.0-14952-g4ccc8467c-dirty	release VTR_ASSERT_LEVEL=2	GNU 11.4.0 on Linux-6.8.0-60-generic x86_64	2026-01-16T17:06:36	soheil-pt372	/home/soheil/vtr/vtr-verilog-to-routing/vtr_flow	62940	51	35	187	222	0	146	126	11	11	242	-1	FPGA3D	22.0 MiB	0.02	1660.09	1043	23121	7736	6274	9111	61.5 MiB	0.13	0.00	4.21934	2.40981	-57.4085	-2.40981	nan	0.00	0.000329194	0.000267281	0.0410733	0.0361782	-1	-1	-1	-1	1118	7.65753	1118	7.65753	675	1871	551544	115279	180575	89172.8	2.31172e+06	9552.56	11	50034	555773	-1	2.80293	nan	-63.6948	-2.80293	0	0	0.75	-1	-1	61.5 MiB	0.11	0.0555803	0.0493153	61.5 MiB	-1	0.07	
3d_k4_N4_90nm_opin_per_block.xml	t481.blif	common	0.95	vpr	62.01 MiB		-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	70	16	-1	-1	success	v8.0.0-14952-g4ccc8467c-dirty	release VTR_ASSERT_LEVEL=2	GNU 11.4.0 on Linux-6.8.0-60-generic x86_64	2026-01-16T17:06:36	soheil-pt372	/home/soheil/vtr/vtr-verilog-to-routing/vtr_flow	63496	16	1	230	231	0	179	87	11	11	242	-1	FPGA3D	22.6 MiB	0.03	2022.46	1417	13719	4412	7595	1712	62.0 MiB	0.09	0.00	6.59406	4.73012	-4.73012	-4.73012	nan	0.00	0.000377733	0.000328672	0.0285307	0.0247825	-1	-1	-1	-1	1936	10.8156	1936	10.8156	1181	4437	1527468	476158	180575	156052	2.31172e+06	9552.56	16	50034	555773	-1	5.10841	nan	-5.10841	-5.10841	0	0	0.43	-1	-1	62.0 MiB	0.20	0.0469135	0.0413804	62.0 MiB	-1	0.05	
3d_k4_N4_90nm_opin_per_block.xml	mm9b.blif	common	0.82	vpr	62.36 MiB		-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	65	13	-1	-1	success	v8.0.0-14952-g4ccc8467c-dirty	release VTR_ASSERT_LEVEL=2	GNU 11.4.0 on Linux-6.8.0-60-generic x86_64	2026-01-16T17:06:36	soheil-pt372	/home/soheil/vtr/vtr-verilog-to-routing/vtr_flow	63860	13	9	243	252	1	172	87	11	11	242	-1	FPGA3D	22.8 MiB	0.03	1851.08	1207	11415	2884	6681	1850	62.4 MiB	0.07	0.00	14.1733	10.4148	-205.51	-10.4148	10.4148	0.00	0.000414609	0.000369744	0.0270534	0.0239012	-1	-1	-1	-1	1487	8.69591	1487	8.69591	923	2885	652612	215495	180575	144906	2.31172e+06	9552.56	12	50034	555773	-1	11.5242	11.5242	-221.637	-11.5242	0	0	0.43	-1	-1	62.4 MiB	0.10	0.0422196	0.037762	62.4 MiB	-1	0.05	
3d_k4_N4_90nm_opin_per_block.xml	styr.blif	common	0.82	vpr	61.79 MiB		-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	71	10	-1	-1	success	v8.0.0-14952-g4ccc8467c-dirty	release VTR_ASSERT_LEVEL=2	GNU 11.4.0 on Linux-6.8.0-60-generic x86_64	2026-01-16T17:06:36	soheil-pt372	/home/soheil/vtr/vtr-verilog-to-routing/vtr_flow	63272	10	10	253	263	1	169	91	11	11	242	-1	FPGA3D	22.9 MiB	0.03	1798.93	1256	12943	3857	7413	1673	61.8 MiB	0.08	0.00	4.70735	3.28489	-41.163	-3.28489	3.28489	0.00	0.000366736	0.000311819	0.0259445	0.0224964	-1	-1	-1	-1	1602	9.53571	1602	9.53571	866	2761	647523	209796	180575	158282	2.31172e+06	9552.56	11	50034	555773	-1	3.42704	3.42704	-43.2139	-3.42704	0	0	0.43	-1	-1	61.8 MiB	0.10	0.0405856	0.0358361	61.8 MiB	-1	0.05	
3d_k4_N4_90nm_opin_per_block.xml	s953.blif	common	0.86	vpr	62.20 MiB		-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	63	17	-1	-1	success	v8.0.0-14952-g4ccc8467c-dirty	release VTR_ASSERT_LEVEL=2	GNU 11.4.0 on Linux-6.8.0-60-generic x86_64	2026-01-16T17:06:36	soheil-pt372	/home/soheil/vtr/vtr-verilog-to-routing/vtr_flow	63692	17	23	260	283	1	175	103	11	11	242	-1	FPGA3D	22.7 MiB	0.04	1974.46	1353	18178	5893	7971	4314	62.2 MiB	0.10	0.00	4.35	3.01765	-80.8097	-3.01765	3.01765	0.00	0.000437008	0.000385242	0.0319192	0.0277798	-1	-1	-1	-1	1584	9.10345	1584	9.10345	930	3122	617517	171745	180575	140447	2.31172e+06	9552.56	11	50034	555773	-1	3.33938	3.33938	-84.6293	-3.33938	0	0	0.44	-1	-1	62.2 MiB	0.10	0.0471359	0.0416864	62.2 MiB	-1	0.05	
