#
############################################
# Configuration file for running experiments
##############################################

# Path to directory of circuits to use
circuits_dir=benchmarks/ispd_blif

# Path to directory of architectures to use
archs_dir=arch/ispd

# Add circuits to list to sweep
circuit_list_add=FPGA-example1.blif
circuit_list_add=clk_design1.blif
circuit_list_add=clk_design2.blif
circuit_list_add=clk_design3.blif
circuit_list_add=FPGA-example2.blif
circuit_list_add=FPGA-example3.blif
circuit_list_add=FPGA-example4.blif
circuit_list_add=clk_design4.blif
circuit_list_add=clk_design5.blif

# Add architectures to list to sweep
arch_list_add=ultrascale_ispd.xml

# Parse info and how to parse
parse_file=vpr_ispd.txt

# How to parse QoR info
qor_parse_file=qor_vpr_ispd.txt

# Pass requirements
pass_requirements_file=pass_requirements_vpr_ispd.txt

#The ISPD architecture is missing a detailed rouing architecture model and
#timing model, so we only do wirelength-driven packing and placement
script_params=-starting_stage vpr --pack --place --timing_analysis off

