#
############################################
# Configuration file for running experiments
##############################################

# Path to directory of circuits to use
circuits_dir=benchmarks/arithmetic/generated_circuits/figure_8/verilog

# Path to directory of architectures to use
archs_dir=arch/timing/fixed_size

# Add circuits to list to sweep

# circuit_list_add=ch_intrinsics.v

# circuit_list_add=adder_001bits.v
# circuit_list_add=adder_002bits.v
# circuit_list_add=adder_003bits.v
# circuit_list_add=adder_004bits.v
circuit_list_add=adder_005bits.v
circuit_list_add=adder_006bits.v
circuit_list_add=adder_007bits.v
circuit_list_add=adder_008bits.v
circuit_list_add=adder_009bits.v
circuit_list_add=adder_010bits.v
circuit_list_add=adder_011bits.v
circuit_list_add=adder_012bits.v
circuit_list_add=adder_013bits.v
circuit_list_add=adder_014bits.v
circuit_list_add=adder_015bits.v
circuit_list_add=adder_016bits.v
# circuit_list_add=adder_017bits.v
circuit_list_add=adder_018bits.v
# circuit_list_add=adder_019bits.v
circuit_list_add=adder_020bits.v
# circuit_list_add=adder_021bits.v
circuit_list_add=adder_022bits.v
# circuit_list_add=adder_023bits.v
circuit_list_add=adder_024bits.v
circuit_list_add=adder_028bits.v
circuit_list_add=adder_032bits.v
circuit_list_add=adder_048bits.v
circuit_list_add=adder_064bits.v
# circuit_list_add=adder_096bits.v
# circuit_list_add=adder_097bits.v
# circuit_list_add=adder_098bits.v
# circuit_list_add=adder_099bits.v
# circuit_list_add=adder_100bits.v
# circuit_list_add=adder_101bits.v
# circuit_list_add=adder_102bits.v
# circuit_list_add=adder_103bits.v
# circuit_list_add=adder_104bits.v
# circuit_list_add=adder_105bits.v
# circuit_list_add=adder_106bits.v
# circuit_list_add=adder_107bits.v
# circuit_list_add=adder_108bits.v
# circuit_list_add=adder_109bits.v
# circuit_list_add=adder_110bits.v
# circuit_list_add=adder_111bits.v
# circuit_list_add=adder_112bits.v
# circuit_list_add=adder_113bits.v
# circuit_list_add=adder_114bits.v
# circuit_list_add=adder_115bits.v
# circuit_list_add=adder_116bits.v
# circuit_list_add=adder_117bits.v
# circuit_list_add=adder_118bits.v
# circuit_list_add=adder_119bits.v
# circuit_list_add=adder_120bits.v
# circuit_list_add=adder_121bits.v
# circuit_list_add=adder_122bits.v
# circuit_list_add=adder_123bits.v
# circuit_list_add=adder_124bits.v
# circuit_list_add=adder_125bits.v
# circuit_list_add=adder_126bits.v
# circuit_list_add=adder_127bits.v
# circuit_list_add=adder_128bits.v
# circuit_list_add=adder_129bits.v
# circuit_list_add=adder_130bits.v
# circuit_list_add=adder_131bits.v
# circuit_list_add=adder_132bits.v
# circuit_list_add=adder_133bits.v
# circuit_list_add=adder_134bits.v
# circuit_list_add=adder_135bits.v
# circuit_list_add=adder_136bits.v
# circuit_list_add=adder_137bits.v
# circuit_list_add=adder_138bits.v
# circuit_list_add=adder_139bits.v
# circuit_list_add=adder_140bits.v
# circuit_list_add=adder_141bits.v
# circuit_list_add=adder_142bits.v
# circuit_list_add=adder_143bits.v
# circuit_list_add=adder_144bits.v
# circuit_list_add=adder_145bits.v
# circuit_list_add=adder_146bits.v
# circuit_list_add=adder_147bits.v
# circuit_list_add=adder_148bits.v
# circuit_list_add=adder_149bits.v
# circuit_list_add=adder_150bits.v
# circuit_list_add=adder_151bits.v
# circuit_list_add=adder_152bits.v
# circuit_list_add=adder_153bits.v
# circuit_list_add=adder_154bits.v
# circuit_list_add=adder_155bits.v
# circuit_list_add=adder_156bits.v
# circuit_list_add=adder_157bits.v
# circuit_list_add=adder_158bits.v
# circuit_list_add=adder_159bits.v
# circuit_list_add=adder_160bits.v

# Add architectures to list to sweep
arch_list_add=fixed_k6_N8_gate_boost_0.2V_22nm.xml
arch_list_add=fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml
arch_list_add=fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml
arch_list_add=fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml
arch_list_add=fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml
arch_list_add=fixed_k6_frac_2ripple_N8_22nm.xml
arch_list_add=fixed_k6_frac_2uripple_N8_22nm.xml
arch_list_add=fixed_k6_frac_N8_22nm.xml
arch_list_add=fixed_k6_frac_ripple_N8_22nm.xml
arch_list_add=fixed_k6_frac_uripple_N8_22nm.xml

# Parse info and how to parse
parse_file=vpr_chain.txt

# How to parse QoR info
qor_parse_file=qor_standard.txt

# Pass requirements
pass_requirements_file=pass_requirements_chain_small.txt

script_params=-start odin -lut_size 6 -routing_failure_predictor off -seed 2
