 arch	  circuit	  script_params	  vtr_flow_elapsed_time	  vtr_max_mem_stage	  vtr_max_mem	  error	  odin_synth_time	  max_odin_mem	  parmys_synth_time	  max_parmys_mem	  abc_depth	  abc_synth_time	  abc_cec_time	  abc_sec_time	  max_abc_mem	  ace_time	  max_ace_mem	  num_clb	  num_io	  num_memories	  num_mult	  vpr_status	  vpr_revision	  vpr_build_info	  vpr_compiler	  vpr_compiled	  hostname	  rundir	  max_vpr_mem	  num_primary_inputs	  num_primary_outputs	  num_pre_packed_nets	  num_pre_packed_blocks	  num_netlist_clocks	  num_post_packed_nets	  num_post_packed_blocks	  device_width	  device_height	  device_grid_tiles	  device_limiting_resources	  device_name	  pack_mem	  pack_time	  initial_placed_wirelength_est	  placed_wirelength_est	  total_swap	  accepted_swap	  rejected_swap	  aborted_swap	  place_mem	  place_time	  place_quench_time	  initial_placed_CPD_est	  placed_CPD_est	  placed_setup_TNS_est	  placed_setup_WNS_est	  placed_geomean_nonvirtual_intradomain_critical_path_delay_est	  place_delay_matrix_lookup_time	  place_quench_timing_analysis_time	  place_quench_sta_time	  place_total_timing_analysis_time	  place_total_sta_time	  ap_mem	  ap_time	  ap_full_legalizer_mem	  ap_full_legalizer_time	  min_chan_width	  routed_wirelength	  min_chan_width_route_success_iteration	  logic_block_area_total	  logic_block_area_used	  min_chan_width_routing_area_total	  min_chan_width_routing_area_per_tile	  min_chan_width_route_time	  min_chan_width_total_timing_analysis_time	  min_chan_width_total_sta_time	  crit_path_num_rr_graph_nodes	  crit_path_num_rr_graph_edges	  crit_path_collapsed_nodes	  crit_path_routed_wirelength	  crit_path_route_success_iteration	  crit_path_total_nets_routed	  crit_path_total_connections_routed	  crit_path_total_heap_pushes	  crit_path_total_heap_pops	  critical_path_delay	  geomean_nonvirtual_intradomain_critical_path_delay	  setup_TNS	  setup_WNS	  hold_TNS	  hold_WNS	  crit_path_routing_area_total	  crit_path_routing_area_per_tile	  router_lookahead_computation_time	  crit_path_route_time	  crit_path_create_rr_graph_time	  crit_path_create_intra_cluster_rr_graph_time	  crit_path_tile_lookahead_computation_time	  crit_path_router_lookahead_computation_time	  crit_path_total_timing_analysis_time	  crit_path_total_sta_time	  num_le	  num_luts	  num_add_blocks	  max_add_chain_length	  num_sub_blocks	  max_sub_chain_length	 
 k6_N8_gate_boost_0.2V_22nm.xml	  Md5Core.v	  common	  457.07	  vpr	  1.03 GiB	  	  -1	  -1	  19.45	  332860	  27	  17.77	  -1	  -1	  141820	  -1	  -1	  6490	  641	  0	  0	  success	  5160a12-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 13.3.0 on Linux-6.8.0-47-generic x86_64	  2025-06-17T12:01:36	  agent-2	  /home/pooladam/actions-runner/_work/vtr-verilog-to-routing/vtr-verilog-to-routing	  1082932	  641	  128	  51957	  52085	  1	  22036	  7259	  95	  95	  9025	  clb	  auto	  334.7 MiB	  22.64	  1.41625e+06	  286820	  8999771	  3648395	  5334557	  16819	  1057.6 MiB	  128.83	  1.01	  63.7476	  15.3991	  -37939.5	  -15.3991	  15.3991	  37.63	  0.0839018	  0.0737497	  11.5678	  9.74704	  -1	  -1	  -1	  -1	  54	  419430	  31	  2.7729e+08	  7.8242e+07	  3.24883e+07	  3599.81	  169.82	  44.855	  38.1218	  868140	  7980670	  -1	  382751	  18	  97152	  219929	  13491310	  2824620	  13.0081	  13.0081	  -34895.1	  -13.0081	  0	  0	  3.98875e+07	  4419.67	  3.38	  8.26	  8.09	  -1	  -1	  3.38	  3.97354	  3.51317	  44005	  14708	  -1	  -1	  -1	  -1	 
 k6_N8_gate_boost_0.2V_22nm.xml	  cordic.v	  common	  4.84	  vpr	  66.78 MiB	  	  -1	  -1	  0.54	  34816	  11	  0.31	  -1	  -1	  36928	  -1	  -1	  53	  54	  0	  0	  success	  5160a12-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 13.3.0 on Linux-6.8.0-47-generic x86_64	  2025-06-17T12:01:36	  agent-2	  /home/pooladam/actions-runner/_work/vtr-verilog-to-routing/vtr-verilog-to-routing	  68380	  54	  51	  469	  520	  1	  288	  158	  11	  11	  121	  clb	  auto	  28.0 MiB	  0.15	  3730.27	  2404	  10406	  1633	  8714	  59	  66.8 MiB	  0.10	  0.00	  6.26799	  5.58699	  -245.076	  -5.58699	  5.58699	  0.14	  0.00113323	  0.00101479	  0.0361564	  0.0327288	  -1	  -1	  -1	  -1	  50	  4795	  21	  2.09946e+06	  638915	  330395.	  2730.53	  2.44	  0.464754	  0.41256	  10372	  74518	  -1	  4746	  19	  1894	  9534	  499087	  118014	  4.98094	  4.98094	  -228.165	  -4.98094	  0	  0	  394937.	  3263.94	  0.02	  0.17	  0.07	  -1	  -1	  0.02	  0.0561	  0.0509304	  359	  359	  -1	  -1	  -1	  -1	 
 k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml	  Md5Core.v	  common	  510.73	  vpr	  972.56 MiB	  	  -1	  -1	  11.67	  223968	  1	  4.01	  -1	  -1	  148800	  -1	  -1	  5506	  641	  0	  0	  success	  5160a12-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 13.3.0 on Linux-6.8.0-47-generic x86_64	  2025-06-17T12:01:36	  agent-2	  /home/pooladam/actions-runner/_work/vtr-verilog-to-routing/vtr-verilog-to-routing	  995904	  641	  128	  55563	  47815	  1	  19075	  6275	  89	  89	  7921	  clb	  auto	  332.7 MiB	  16.68	  976935	  221519	  8510666	  3502562	  4922633	  85471	  972.6 MiB	  228.24	  1.60	  20.6721	  7.11399	  -24885.7	  -7.11399	  7.11399	  34.69	  0.0675239	  0.0546623	  9.9163	  8.22281	  -1	  -1	  -1	  -1	  66	  301477	  49	  2.46893e+08	  6.915e+07	  3.31523e+07	  4185.37	  161.64	  39.86	  33.6356	  846610	  8512169	  -1	  280859	  18	  72886	  119440	  10650577	  2025138	  4.72149	  4.72149	  -21607	  -4.72149	  0	  0	  4.13768e+07	  5223.69	  3.50	  5.59	  9.06	  -1	  -1	  3.50	  2.82843	  2.48197	  40344	  2050	  -1	  -1	  -1	  -1	 
 k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml	  cordic.v	  common	  6.58	  vpr	  67.06 MiB	  	  -1	  -1	  0.51	  34052	  4	  0.19	  -1	  -1	  36356	  -1	  -1	  47	  54	  0	  0	  success	  5160a12-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 13.3.0 on Linux-6.8.0-47-generic x86_64	  2025-06-17T12:01:36	  agent-2	  /home/pooladam/actions-runner/_work/vtr-verilog-to-routing/vtr-verilog-to-routing	  68668	  54	  51	  500	  499	  1	  292	  152	  10	  10	  100	  clb	  auto	  28.1 MiB	  2.03	  3138.44	  2139	  10682	  1809	  8637	  236	  67.1 MiB	  0.13	  0.01	  5.20696	  4.6204	  -240.071	  -4.6204	  4.6204	  0.12	  0.00113809	  0.00103398	  0.0398264	  0.0363512	  -1	  -1	  -1	  -1	  46	  4536	  48	  1.94278e+06	  590226	  244280.	  2442.80	  2.52	  0.486458	  0.430876	  8570	  55715	  -1	  3750	  18	  1668	  7405	  328937	  81808	  3.75914	  3.75914	  -208.111	  -3.75914	  0	  0	  298105.	  2981.05	  0.02	  0.14	  0.05	  -1	  -1	  0.02	  0.0546231	  0.0501524	  307	  278	  -1	  -1	  -1	  -1	 
 k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml	  Md5Core.v	  common	  477.14	  vpr	  1022.53 MiB	  	  -1	  -1	  11.98	  224704	  1	  3.98	  -1	  -1	  149008	  -1	  -1	  5615	  641	  0	  0	  success	  5160a12-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 13.3.0 on Linux-6.8.0-47-generic x86_64	  2025-06-17T12:01:36	  agent-2	  /home/pooladam/actions-runner/_work/vtr-verilog-to-routing/vtr-verilog-to-routing	  1047072	  641	  128	  55563	  47815	  1	  19621	  6384	  89	  89	  7921	  clb	  auto	  340.6 MiB	  66.13	  1.02302e+06	  220967	  8826737	  3633964	  5104844	  87929	  1022.5 MiB	  230.74	  1.63	  18.7552	  7.29933	  -25353.4	  -7.29933	  7.29933	  35.28	  0.0615973	  0.0532609	  9.92999	  8.24516	  -1	  -1	  -1	  -1	  60	  298362	  50	  2.47551e+08	  7.11929e+07	  3.04132e+07	  3839.56	  76.04	  28.1421	  23.6687	  814930	  7734163	  -1	  279828	  22	  75821	  112053	  9940361	  1991978	  4.77239	  4.77239	  -21726.1	  -4.77239	  0	  0	  3.78426e+07	  4777.50	  3.26	  6.26	  7.92	  -1	  -1	  3.26	  3.34993	  2.92666	  40785	  2050	  -1	  -1	  -1	  -1	 
 k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml	  cordic.v	  common	  3.88	  vpr	  67.71 MiB	  	  -1	  -1	  0.48	  33888	  4	  0.19	  -1	  -1	  36692	  -1	  -1	  48	  54	  0	  0	  success	  5160a12-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 13.3.0 on Linux-6.8.0-47-generic x86_64	  2025-06-17T12:01:36	  agent-2	  /home/pooladam/actions-runner/_work/vtr-verilog-to-routing/vtr-verilog-to-routing	  69336	  54	  51	  500	  499	  1	  300	  153	  10	  10	  100	  clb	  auto	  28.8 MiB	  0.59	  3123.28	  2189	  9151	  1389	  7498	  264	  67.7 MiB	  0.11	  0.00	  5.10073	  4.43856	  -229.402	  -4.43856	  4.43856	  0.11	  0.00117885	  0.00106081	  0.0335546	  0.0306173	  -1	  -1	  -1	  -1	  46	  4580	  40	  1.94854e+06	  608544	  244280.	  2442.80	  1.36	  0.310841	  0.277073	  8570	  55715	  -1	  3770	  16	  1520	  6386	  295028	  73299	  3.70529	  3.70529	  -201.977	  -3.70529	  0	  0	  298105.	  2981.05	  0.02	  0.12	  0.05	  -1	  -1	  0.02	  0.05017	  0.0464468	  303	  278	  -1	  -1	  -1	  -1	 
