arch	circuit	script_params	vtr_flow_elapsed_time	vtr_max_mem_stage	vtr_max_mem	error	odin_synth_time	max_odin_mem	parmys_synth_time	max_parmys_mem	abc_depth	abc_synth_time	abc_cec_time	abc_sec_time	max_abc_mem	ace_time	max_ace_mem	num_clb	num_io	num_memories	num_mult	vpr_status	vpr_revision	vpr_build_info	vpr_compiler	vpr_compiled	hostname	rundir	max_vpr_mem	num_primary_inputs	num_primary_outputs	num_pre_packed_nets	num_pre_packed_blocks	num_netlist_clocks	num_post_packed_nets	num_post_packed_blocks	device_width	device_height	device_grid_tiles	device_limiting_resources	device_name	pack_mem	pack_time	initial_placed_wirelength_est	placed_wirelength_est	total_swap	accepted_swap	rejected_swap	aborted_swap	place_mem	place_time	place_quench_time	initial_placed_CPD_est	placed_CPD_est	placed_setup_TNS_est	placed_setup_WNS_est	placed_geomean_nonvirtual_intradomain_critical_path_delay_est	place_delay_matrix_lookup_time	place_quench_timing_analysis_time	place_quench_sta_time	place_total_timing_analysis_time	place_total_sta_time	ap_mem	ap_time	ap_full_legalizer_mem	ap_full_legalizer_time	min_chan_width	routed_wirelength	min_chan_width_route_success_iteration	logic_block_area_total	logic_block_area_used	min_chan_width_routing_area_total	min_chan_width_routing_area_per_tile	min_chan_width_route_time	min_chan_width_total_timing_analysis_time	min_chan_width_total_sta_time	crit_path_num_rr_graph_nodes	crit_path_num_rr_graph_edges	crit_path_collapsed_nodes	crit_path_routed_wirelength	crit_path_route_success_iteration	crit_path_total_nets_routed	crit_path_total_connections_routed	crit_path_total_heap_pushes	crit_path_total_heap_pops	critical_path_delay	geomean_nonvirtual_intradomain_critical_path_delay	setup_TNS	setup_WNS	hold_TNS	hold_WNS	crit_path_routing_area_total	crit_path_routing_area_per_tile	router_lookahead_computation_time	crit_path_route_time	crit_path_create_rr_graph_time	crit_path_create_intra_cluster_rr_graph_time	crit_path_tile_lookahead_computation_time	crit_path_router_lookahead_computation_time	crit_path_total_timing_analysis_time	crit_path_total_sta_time	
k6_N10_mem32K_40nm.xml	mkPktMerge.v	common	6.31	vpr	70.39 MiB		-1	-1	0.75	25736	2	0.09	-1	-1	33528	-1	-1	43	311	15	0	success	v8.0.0-12648-g259ceba57-dirty	release IPO VTR_ASSERT_LEVEL=2	Clang 18.1.3 on Linux-6.8.0-58-generic x86_64	2025-05-06T12:34:13	betzgrp-wintermute	/home/zhan6738/VTR/vtr-verilog-to-routing/vtr_flow/tasks	72080	311	156	972	1128	1	953	525	28	28	784	memory	auto	31.2 MiB	0.27	18876	8716	214342	80322	124048	9972	70.4 MiB	0.61	0.01	4.91229	4.39077	-4239.94	-4.39077	4.39077	0.60	0.00262128	0.0023325	0.283495	0.251921	-1	-1	-1	-1	40	13591	16	4.25198e+07	1.05374e+07	2.03169e+06	2591.44	1.96	0.889033	0.801036	62360	400487	-1	12638	13	2518	2949	727753	230227	4.48005	4.48005	-4599.19	-4.48005	-24.1998	-0.322548	2.55406e+06	3257.73	0.08	0.18	0.22	-1	-1	0.08	0.10009	0.0930957	
