 arch	  circuit	  script_params	  vtr_flow_elapsed_time	  vtr_max_mem_stage	  vtr_max_mem	  error	  odin_synth_time	  max_odin_mem	  parmys_synth_time	  max_parmys_mem	  abc_depth	  abc_synth_time	  abc_cec_time	  abc_sec_time	  max_abc_mem	  ace_time	  max_ace_mem	  num_clb	  num_io	  num_memories	  num_mult	  vpr_status	  vpr_revision	  vpr_build_info	  vpr_compiler	  vpr_compiled	  hostname	  rundir	  max_vpr_mem	  num_primary_inputs	  num_primary_outputs	  num_pre_packed_nets	  num_pre_packed_blocks	  num_netlist_clocks	  num_post_packed_nets	  num_post_packed_blocks	  device_width	  device_height	  device_grid_tiles	  device_limiting_resources	  device_name	  pack_mem	  pack_time	  placed_wirelength_est	  total_swap	  accepted_swap	  rejected_swap	  aborted_swap	  place_mem	  place_time	  place_quench_time	  placed_CPD_est	  placed_setup_TNS_est	  placed_setup_WNS_est	  placed_geomean_nonvirtual_intradomain_critical_path_delay_est	  place_delay_matrix_lookup_time	  place_quench_timing_analysis_time	  place_quench_sta_time	  place_total_timing_analysis_time	  place_total_sta_time	  ap_mem	  ap_time	  ap_full_legalizer_mem	  ap_full_legalizer_time	  min_chan_width	  routed_wirelength	  min_chan_width_route_success_iteration	  logic_block_area_total	  logic_block_area_used	  min_chan_width_routing_area_total	  min_chan_width_routing_area_per_tile	  min_chan_width_route_time	  min_chan_width_total_timing_analysis_time	  min_chan_width_total_sta_time	  crit_path_num_rr_graph_nodes	  crit_path_num_rr_graph_edges	  crit_path_collapsed_nodes	  crit_path_routed_wirelength	  crit_path_route_success_iteration	  crit_path_total_nets_routed	  crit_path_total_connections_routed	  crit_path_total_heap_pushes	  crit_path_total_heap_pops	  critical_path_delay	  geomean_nonvirtual_intradomain_critical_path_delay	  setup_TNS	  setup_WNS	  hold_TNS	  hold_WNS	  crit_path_routing_area_total	  crit_path_routing_area_per_tile	  router_lookahead_computation_time	  crit_path_route_time	  crit_path_create_rr_graph_time	  crit_path_create_intra_cluster_rr_graph_time	  crit_path_tile_lookahead_computation_time	  crit_path_router_lookahead_computation_time	  crit_path_total_timing_analysis_time	  crit_path_total_sta_time	 
 k4_n4_v7_bidir.xml	  styr.blif	  common	  1.44	  vpr	  58.23 MiB	  	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  69	  10	  -1	  -1	  success	  v8.0.0-11920-g63becbef4-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2024-12-04T15:29:41	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/release/vtr-verilog-to-routing	  59632	  10	  10	  253	  263	  1	  165	  89	  11	  11	  121	  clb	  auto	  18.5 MiB	  0.06	  1278	  5435	  986	  4142	  307	  58.2 MiB	  0.05	  0.00	  5.60056	  -74.3087	  -5.60056	  5.60056	  0.05	  0.000759596	  0.000697523	  0.0232914	  0.0215494	  -1	  -1	  -1	  -1	  14	  2240	  38	  2.43e+06	  2.07e+06	  -1	  -1	  0.63	  0.18948	  0.161241	  3402	  27531	  -1	  1932	  21	  1349	  4527	  254012	  32201	  7.18745	  7.18745	  -93.1752	  -7.18745	  0	  0	  -1	  -1	  0.00	  0.08	  0.02	  -1	  -1	  0.00	  0.0331481	  0.0287714	 
 k4_n4_v7_longline_bidir.xml	  styr.blif	  common	  1.90	  vpr	  57.80 MiB	  	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  69	  10	  -1	  -1	  success	  v8.0.0-11920-g63becbef4-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2024-12-04T15:29:41	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/release/vtr-verilog-to-routing	  59184	  10	  10	  253	  263	  1	  165	  89	  11	  11	  121	  clb	  auto	  18.7 MiB	  0.06	  1243	  3851	  530	  3175	  146	  57.8 MiB	  0.04	  0.00	  4.42129	  -53.6285	  -4.42129	  4.42129	  0.06	  0.000771845	  0.000711668	  0.0182679	  0.0169338	  -1	  -1	  -1	  -1	  17	  2541	  28	  2.43e+06	  2.07e+06	  -1	  -1	  1.10	  0.312089	  0.262687	  3202	  31699	  -1	  2384	  28	  1486	  5716	  389544	  49378	  8.64337	  8.64337	  -110.787	  -8.64337	  0	  0	  -1	  -1	  0.01	  0.11	  0.02	  -1	  -1	  0.01	  0.0396599	  0.034032	 
 k4_n4_v7_l1_bidir.xml	  styr.blif	  common	  1.65	  vpr	  58.45 MiB	  	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  69	  10	  -1	  -1	  success	  v8.0.0-11920-g63becbef4-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2024-12-04T15:29:41	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/release/vtr-verilog-to-routing	  59856	  10	  10	  253	  263	  1	  165	  89	  11	  11	  121	  clb	  auto	  18.7 MiB	  0.06	  1249	  6821	  1452	  5028	  341	  58.5 MiB	  0.07	  0.00	  6.30077	  -80.949	  -6.30077	  6.30077	  0.08	  0.00075773	  0.000697577	  0.0295575	  0.0273441	  -1	  -1	  -1	  -1	  10	  1483	  31	  2.43e+06	  2.07e+06	  -1	  -1	  0.76	  0.134661	  0.116272	  4482	  22551	  -1	  1280	  20	  1321	  4798	  303501	  58064	  7.52318	  7.52318	  -89.7629	  -7.52318	  0	  0	  -1	  -1	  0.00	  0.10	  0.02	  -1	  -1	  0.00	  0.0302867	  0.0261703	 
 k4_n4_v7_bidir_pass_gate.xml	  styr.blif	  common	  2.43	  vpr	  58.23 MiB	  	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  69	  10	  -1	  -1	  success	  v8.0.0-11920-g63becbef4-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2024-12-04T15:29:41	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/release/vtr-verilog-to-routing	  59632	  10	  10	  253	  263	  1	  165	  89	  11	  11	  121	  clb	  auto	  18.5 MiB	  0.06	  1299	  4049	  535	  3343	  171	  58.2 MiB	  0.04	  0.00	  3.54832	  -43.6356	  -3.54832	  3.54832	  0.05	  0.000760542	  0.000695699	  0.0181752	  0.016821	  -1	  -1	  -1	  -1	  16	  2145	  31	  2.43e+06	  2.07e+06	  -1	  -1	  1.50	  0.214135	  0.181761	  3522	  30407	  -1	  2163	  26	  1570	  5643	  1007482	  177921	  12.6452	  12.6452	  -167.938	  -12.6452	  0	  0	  -1	  -1	  0.01	  0.23	  0.02	  -1	  -1	  0.01	  0.0372313	  0.0320086	 
