 arch	  circuit	  script_params	  vtr_flow_elapsed_time	  vtr_max_mem_stage	  vtr_max_mem	  error	  odin_synth_time	  max_odin_mem	  parmys_synth_time	  max_parmys_mem	  abc_depth	  abc_synth_time	  abc_cec_time	  abc_sec_time	  max_abc_mem	  ace_time	  max_ace_mem	  num_clb	  num_io	  num_memories	  num_mult	  vpr_status	  vpr_revision	  vpr_build_info	  vpr_compiler	  vpr_compiled	  hostname	  rundir	  max_vpr_mem	  num_primary_inputs	  num_primary_outputs	  num_pre_packed_nets	  num_pre_packed_blocks	  num_netlist_clocks	  num_post_packed_nets	  num_post_packed_blocks	  device_width	  device_height	  device_grid_tiles	  device_limiting_resources	  device_name	  pack_mem	  pack_time	  placed_wirelength_est	  total_swap	  accepted_swap	  rejected_swap	  aborted_swap	  place_mem	  place_time	  place_quench_time	  placed_CPD_est	  placed_setup_TNS_est	  placed_setup_WNS_est	  placed_geomean_nonvirtual_intradomain_critical_path_delay_est	  place_delay_matrix_lookup_time	  place_quench_timing_analysis_time	  place_quench_sta_time	  place_total_timing_analysis_time	  place_total_sta_time	  ap_mem	  ap_time	  ap_full_legalizer_mem	  ap_full_legalizer_time	  routed_wirelength	  avg_routed_wirelength	  routed_wiresegment	  avg_routed_wiresegment	  total_nets_routed	  total_connections_routed	  total_heap_pushes	  total_heap_pops	  logic_block_area_total	  logic_block_area_used	  routing_area_total	  routing_area_per_tile	  crit_path_route_success_iteration	  num_rr_graph_nodes	  num_rr_graph_edges	  collapsed_nodes	  critical_path_delay	  geomean_nonvirtual_intradomain_critical_path_delay	  setup_TNS	  setup_WNS	  hold_TNS	  hold_WNS	  create_rr_graph_time	  create_intra_cluster_rr_graph_time	  adding_internal_edges	  route_mem	  crit_path_route_time	  crit_path_total_timing_analysis_time	  crit_path_total_sta_time	  router_lookahead_mem	  tile_lookahead_computation_time	  router_lookahead_computation_time	 
 k4_n4_v7_bidir.xml	  dsip.blif	  common	  25.73	  vpr	  128.81 MiB	  	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  443	  229	  -1	  -1	  success	  v8.0.0-11925-ga544f5fea-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2025-01-14T21:35:49	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/release/vtr-verilog-to-routing	  131904	  229	  197	  1815	  2012	  1	  1190	  869	  29	  29	  841	  io	  auto	  27.9 MiB	  0.38	  11808	  386354	  130262	  246701	  9391	  128.8 MiB	  2.12	  0.03	  8.26026	  -2002.89	  -8.26026	  8.26026	  0.00	  0.00584398	  0.00529802	  0.564955	  0.515177	  -1	  -1	  -1	  -1	  14837	  12.4786	  3857	  3.24390	  5280	  18595	  4288015	  314127	  2.187e+07	  1.329e+07	  -1	  -1	  12	  141714	  3348831	  -1	  10.3649	  10.3649	  -2489.23	  -10.3649	  0	  0	  1.96	  -1	  -1	  128.8 MiB	  0.87	  0.747411	  0.681765	  128.8 MiB	  -1	  0.72	 
 k4_n4_v7_bidir.xml	  elliptic.blif	  common	  38.86	  vpr	  178.71 MiB	  	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  -1	  1023	  131	  -1	  -1	  success	  v8.0.0-11925-ga544f5fea-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.4.0 on Linux-4.15.0-213-generic x86_64	  2025-01-14T21:35:49	  betzgrp-wintermute.eecg.utoronto.ca	  /home/elgamma8/research/release/vtr-verilog-to-routing	  182996	  131	  114	  4855	  4969	  1	  2112	  1268	  34	  34	  1156	  clb	  auto	  44.7 MiB	  0.81	  31400	  563788	  196591	  359179	  8018	  178.7 MiB	  4.04	  0.04	  22.2892	  -11723.6	  -22.2892	  22.2892	  0.01	  0.0103809	  0.00927175	  1.12003	  0.959229	  -1	  -1	  -1	  -1	  40056	  18.9749	  10269	  4.86452	  9570	  44105	  8008892	  526134	  3.072e+07	  3.069e+07	  -1	  -1	  19	  194754	  4643496	  -1	  27.7541	  27.7541	  -14616.1	  -27.7541	  0	  0	  2.77	  -1	  -1	  178.7 MiB	  1.77	  1.60391	  1.38102	  178.7 MiB	  -1	  1.04	 
