# Copyright 2020, 2024 NXP
# SPDX-License-Identifier: Apache-2.0

config SOC_MIMXRT685S_CM33
	select ARM
	select CPU_CORTEX_M33
	select CPU_CORTEX_M_HAS_DWT
	select CLOCK_CONTROL
	select SOC_RESET_HOOK
	select HAS_PM
	select CPU_HAS_ARM_SAU
	select CPU_HAS_ARM_MPU
	select CPU_HAS_FPU
	select ARMV8_M_DSP
	select ARM_TRUSTZONE_M
	select CPU_CORTEX_M_HAS_SYSTICK
	select HAS_MCUX
	select HAS_MCUX_CACHE
	select INIT_SYS_PLL
	select SOC_EARLY_INIT_HOOK

config SOC_MIMXRT685S_HIFI4
	select XTENSA
	select XTENSA_HAL if ("$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc" && "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xt-clang")
	select XTENSA_RESET_VECTOR
	select XTENSA_USE_CORE_CRT1
	select CLOCK_CONTROL
	select HAS_MCUX
	select SOC_EARLY_INIT_HOOK
	select NXP_INPUTMUX

if SOC_SERIES_IMXRT6XX

config MCUX_CORE_SUFFIX
	default "_cm33" if SOC_MIMXRT685S_CM33
	default "_dsp" if SOC_MIMXRT685S_HIFI4

if SOC_MIMXRT685S_CM33

config INIT_SYS_PLL
	bool "Initialize SYS PLL"

config INIT_AUDIO_PLL
	bool "Initialize Audio PLL"

config XTAL_SYS_CLK_HZ
	int "External oscillator frequency"
	help
	  Set the external oscillator frequency in Hz. This should be set by the
	  board's defconfig.

config SYSOSC_SETTLING_US
	int "System oscillator settling time"
	help
	  Set the board system oscillator settling time in us. This should be set by the
	  board's defconfig.

config IMXRT6XX_CODE_CACHE
	bool "Code cache"
	default y
	help
	  Enable code cache for FlexSPI region at boot. If this Kconfig is
	  cleared, the CACHE64 controller will be disabled during SOC init

endif # SOC_MIMXRT685S_CM33

if SOC_MIMXRT685S_HIFI4

DT_ADSP_RESET_MEM := $(dt_nodelabel_path,adsp_reset)
DT_ADSP_DATA_MEM := $(dt_nodelabel_path,adsp_data)
DT_ADSP_TEXT_MEM := $(dt_nodelabel_path,adsp_text)

config RT685_ADSP_STACK_SIZE
	hex "Boot time stack size"
	default 0x1000
	help
	  Stack space is reserved at the end of the RT685_ADSP_DATA_MEM
	  region, starting at RT685_ADSP_DATA_MEM_ADDR - RT685_ADSP_STACK_SIZE

config RT685_ADSP_RESET_MEM_ADDR
	hex
	default $(dt_node_reg_addr_hex,$(DT_ADSP_RESET_MEM))

config RT685_ADSP_RESET_MEM_SIZE
	hex
	default $(dt_node_reg_size_hex,$(DT_ADSP_RESET_MEM))

config RT685_ADSP_DATA_MEM_ADDR
	hex
	default $(dt_node_reg_addr_hex,$(DT_ADSP_DATA_MEM))

config RT685_ADSP_DATA_MEM_SIZE
	hex
	default $(dt_node_reg_size_hex,$(DT_ADSP_DATA_MEM))

config RT685_ADSP_TEXT_MEM_ADDR
	hex
	default $(dt_node_reg_addr_hex,$(DT_ADSP_TEXT_MEM))

config RT685_ADSP_TEXT_MEM_SIZE
	hex
	default $(dt_node_reg_size_hex,$(DT_ADSP_TEXT_MEM))

endif # SOC_MIMXRT685S_HIFI4

endif # SOC_SERIES_IMXRT6XX
