# SPDX-License-Identifier: Apache-2.0
#
# Copyright (c) 2025 Ambiq Micro Inc.

config SOC_SERIES_APOLLO5X
	select ARM
	select CPU_CORTEX_M55
	select CPU_CORTEX_M_HAS_DWT
	select CPU_CORTEX_M_HAS_VTOR
	select CPU_HAS_ARM_SAU
	select CPU_HAS_ARM_MPU
	select CPU_HAS_FPU
	select ARMV8_M_DSP
	select ARMV8_1_M_MVEI
	select ARMV8_1_M_MVEF
	select ARMV8_1_M_PMU
	select HAS_SWO
	select AMBIQ_HAL
	select HAS_PM
	select SOC_EARLY_INIT_HOOK
	select REQUIRES_FULL_LIBC

config SOC_AMBIQ_HAS_PUF
	bool "Ambiq PUF support"
	default y
	help
	  This option enables the Ambiq PUF support.
	  It is required for the true random number generator.

config SOC_AMBIQ_DCACHE_SIZE
	int
	default 65536 if SOC_APOLLO510

config SOC_AMBIQ_DMA_BUFF_LOCATION
	hex "Byte offset to SRAM_BASE_ADDRESS"
	default 0x50000
	help
	  This option specifies the cacheable DMA buffers' start address

config SOC_AMBIQ_DMA_BUFF_ALIGNMENT
	int "Byte alignment of the DMA buffer"
	default DCACHE_LINE_SIZE if DCACHE
	default 1
	help
	  This option specifies the DMA buffers' alignment

config ARMV8_1_M_PMU_EVENTCNT
	int
	default 8 if SOC_APOLLO510
