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xilskey
Vitis Drivers API Documentation
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xilskey
Vitis Drivers API Documentation
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This file contains the PS eFUSE API's of ZynqMp to program/read the eFUSE array.
MODIFICATION HISTORY:
Ver Who Date Changes
4.0 vns 10/01/15 First release vns 10/20/15 Modified XilSKey_ZynqMp_EfusePs_ReadSecCtrlBits API when reading from efuse memory to return both bits of secure control feature for RSA enable, PPK hash bits invalid bits. 6.0 vns 07/18/16 PR #1968, Provided User FUSEs single bit programming Removed JTAG User code programming and reading feature. Added temperature and voltage checks, while programming and reading eFUSE array. Added separate function to set timing parameters and sysmon PSU driver initialization. Added init function while from eFUSE. Added appropriate error codes on failure returns. vns 08/24/16 Fixed eFUSE ZynqMP programming by adding unlocking before eFUSE PS initialization. 6.2 vns 02/18/17 Added margin reads for verifying, added CRC check, Removed temperature checks for each bit. Added temperature checks in all read APIs. 6.4 vns 02/19/18 Added efuse cache reload call in function XilSKey_ZynqMp_EfusePs_Write(), so on successful efuse programming, programmed fuses can directly read from cache of the efuse. 6.6 vns 06/06/18 Added doxygen tags vns 09/18/18 Added APIs to support eFUSE programming from linux vns 10/11/18 Added support to re-program non-zero SPKID 6.7 arc 01/05/19 Fixed MISRA-C violations. arc 25/02/19 Added NULL checks and validations for input params and add timeouts and status info arc 03/15/19 Modified initial default status value as XST_FAILURE 6.7 psl 03/21/19 Fixed MISRA-C violation. 6.8 psl 06/07/19 Added doxygen tags psl 06/25/19 Fixed Coverity warnings. psl 06/28/19 Added doxygen tags. psl 07/05/19 Added Asserts for validation. psl 07/12/19 Corrected length of data to read for XilSKey_EfusePs_ConvertBytesBeToLe function. psl 07/23/19 Fixed input validations. vns 08/07/19 Fixed CTRL LOCK in XilSKey_ZynqMp_EfusePs_ReadSecCtrlBits psl 08/13/19 Fixed MISRA-C violation vns 08/29/19 Initialized Status variables vns 09/17/19 Removed Tbits programming from library as they are to be programmed under manufacturing list. 6.9 kpt 02/16/20 Fixed coverity warnings 02/27/20 Added Error codes in XilSKey_ZynqMp_EfusePs_WriteBit 02/27/20 Removed extra ppk hash zeroes checking in XilSKey_ZynqMp_EfusePs_Write 03/18/20 Replaced while loop with Xil_WaitForEvents in XilSKey_ZynqMp_EfusePs_WriteBit, XilSKey_ZynqMp_EfusePs_ReadRow. vns 03/18/20 Fixed Armcc compilation errors kal 03/18/20 Removed Temp and Voltage check while checking AES key CRC. kal 03/20/20 Removed Temp and Voltage checks for eFuse reads. kpt 03/17/20 Replaced direct eFuse reads with cache reads and Error code is returned when user chooses read option as eFuse. ana 04/07/20 Removed IsPpk0Sha3Hash and IsPpk1Sha3Hash variabes, as these are not required with only sha3 support. kal 04/09/20 Added Temp and Voltage checks before unlocking the controller. 7.0 kal 06/04/20 Fixed XilSKey_ZynqMp_EfusePs_CheckAesKeyCrc return Status in case of success. am 10/04/20 Resolved MISRA C violations 7.1 am 11/29/20 Resolved MISRA C violations kal 03/14/21 Added eFuse classification for eFuse read/write IPI requests kpt 05/11/21 Added Baremetal support for programming PUF Fuses as general purpose data kpt 05/21/21 Added support to allow PPK Hash programming multiple times 7.2 am 07/13/21 Fixed doxygen warnings 7.7 kal 04/09/25 Update XilSKey_ZynqMp_EfusePs_Write_UsrCtrlBits to return Success in case the request is to program already programmed eFuses.
Functions | |
| u32 | XilSKey_ZynqMp_EfusePs_Write (XilSKey_ZynqMpEPs *InstancePtr) |
| This function is used to program the PS eFUSE of ZynqMP, based on user inputs. More... | |
| u32 | XilSKey_ZynqMp_EfusePs_ReadSecCtrlBits (XilSKey_SecCtrlBits *ReadBackSecCtrlBits, u8 ReadOption) |
| This function is used to read the PS eFUSE secure control bits from cache or eFUSE based on user input provided. More... | |
| u32 | XilSKey_ZynqMp_EfusePs_WriteAndVerifyBit (u8 Row, u8 Column, XskEfusePs_Type EfuseType) |
| This function programs and verifies the particular bit of eFUSE array. More... | |
| u32 | XilSKey_ZynqMp_EfusePs_ReadRow (u8 Row, XskEfusePs_Type EfuseType, u32 *RowData) |
| This function returns particular row data directly from eFUSE array. More... | |
| u32 | XilSKey_ZynqMp_EfusePs_CacheLoad (void) |
| This function reloads the cache of eFUSE so that can be directly read from cache. More... | |
| u32 | XilSKey_ZynqMp_EfusePs_SetWriteConditions (void) |
| This function sets all the required parameters to program eFUSE array. More... | |
| void | XilSKey_ZynqMp_EfusePs_SetTimerValues (void) |
| This function sets timers for programming and reading from eFUSE. More... | |
| u32 | XilSKey_ZynqMp_EfusePs_CheckAesKeyCrc (u32 CrcValue) |
| This function performs the CRC check of AES key. More... | |
| u32 | XilSKey_ZynqMp_EfusePs_ReadUserFuse (u32 *UseFusePtr, u8 UserFuse_Num, u8 ReadOption) |
| This function is used to read a user fuse from the eFUSE or cache. More... | |
| u32 | XilSKey_ZynqMp_EfusePs_ReadPpk0Hash (u32 *Ppk0Hash, u8 ReadOption) |
| This function is used to read the PPK0 hash from an eFUSE or eFUSE cache. More... | |
| u32 | XilSKey_ZynqMp_EfusePs_ReadPpk1Hash (u32 *Ppk1Hash, u8 ReadOption) |
| This function is used to read the PPK1 hash from eFUSE or cache. More... | |
| u32 | XilSKey_ZynqMp_EfusePs_ReadSpkId (u32 *SpkId, u8 ReadOption) |
| This function is used to read SPKID from eFUSE or cache based on user's read option. More... | |
| void | XilSKey_ZynqMp_EfusePs_ReadDna (u32 *DnaRead) |
| This function is used to read DNA from eFUSE. More... | |
| u32 | XilSKey_ZynqMp_EfusePs_CheckForZeros (u8 RowStart, u8 RowEnd, XskEfusePs_Type EfuseType) |
| This function is used verify eFUSE keys for Zeros. More... | |
| u32 | XilSKey_ZynqMp_EfusePs_Init (void) |
| This function initializes sysmonpsu driver. More... | |
| u32 | XilSkey_ZynqMpEfuseAccess (const u32 AddrHigh, const u32 AddrLow) |
| This function is used by PMUFW IPI call handler for programming eFUSE. More... | |
API declarations | |
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