Zynq EFUSE PS

Functions
u32	XilSKey_EfusePs_Write (XilSKey_EPs *InstancePtr)
	PS eFUSE interface functions. More...
u32	XilSKey_EfusePs_Read (XilSKey_EPs *InstancePtr)
	This function is used to read the PS eFUSE. More...
u32	XilSKey_EfusePs_ReadStatus (XilSKey_EPs *InstancePtr, u32 *StatusBits)
	This function is used to read the PS efuse status register. More...

Function Documentation

u32 XilSKey_EfusePs_Read

(

XilSKey_EPs *

InstancePtr

)

This function is used to read the PS eFUSE.

Parameters

InstancePtr

- Pointer to the PsEfuseHandle which describes which PS eFUSE should be burned.

Returns

• XST_SUCCESS no errors occurred.
• In case of error, value is as defined in xilskey_utils.h. Error value is a combination of Upper 8 bit value and Lower 8 bit value. For example, 0x8A03 should be checked in error.h as 0x8A00 and 0x03. Upper 8 bit value signifies the major error and lower 8 bit values tells more precisely.

Note

When called: This API initializes the timer, XADC subsystems. Unlocks the PS eFUSE Controller. Configures the PS eFUSE Controller and enables read-only mode. Reads the PS eFUSE (Hash Value), and enables read-only mode. Locks the PS eFUSE Controller. Returns an error, if the reference clock frequency is not in between 20 and 60MHz. or if unable to unlock PS eFUSE controller or requested address corresponds to restricted bits. or if the temperature and voltage are not within range

Check the variables

XAdc Initialization

Unlock the eFUSE controller

Check if the controller is unlocked

Configure the eFUSE controller with mode, strobe width values

Enable eFUSE reading only

Read the eFUSE

Read the RSA key Hash value from eFUSE Array

Disable Programming, write and read

Lock the eFUSE controller

References XilSKey_EfusePs_ControllerConfig(), XilSKey_EfusePs_ControllerSetReadWriteEnable(), XilSKey_EfusePs_XAdcInit(), XilSKey_Timer_Intialise(), XSK_EFUSEPS_CONTROLER_LOCK, XSK_EFUSEPS_CONTROLER_LOCK_STATUS, XSK_EFUSEPS_CONTROLER_UNLOCK, XSK_EFUSEPS_ERROR_CONTROLLER_CONFIG, XSK_EFUSEPS_ERROR_CONTROLLER_LOCK, XSK_EFUSEPS_ERROR_PS_PARAMETER_WRONG, XSK_EFUSEPS_ERROR_PS_STRUCT_NULL, XSK_EFUSEPS_ERROR_READ_RSA_HASH, XSK_EFUSEPS_ERROR_XADC_INIT, and XSK_EFUSEPS_READ_MODE_NORMAL.

Referenced by main().

u32 XilSKey_EfusePs_ReadStatus	(	XilSKey_EPs *	InstancePtr,
		u32 *	StatusBits
	)

This function is used to read the PS efuse status register.

Parameters

InstancePtr	Pointer to the PS eFUSE instance.
StatusBits	Buffer to store the status register read.

Returns

• XST_SUCCESS.
• XST_FAILURE

Note

This API unlocks the controller and reads the Zynq PS eFUSE status register.

Unlock the eFUSE controller

Check if the controller is unlocked

Read the eFUSE status

References XSK_EFUSEPS_CONTROLER_LOCK_STATUS, XSK_EFUSEPS_CONTROLER_UNLOCK, XSK_EFUSEPS_ERROR_CONTROLLER_LOCK, XSK_EFUSEPS_ERROR_PS_STRUCT_NULL, and XSK_EFUSEPS_STATUS_REG.

Referenced by main().

u32 XilSKey_EfusePs_Write

(

XilSKey_EPs *

InstancePtr

)

PS eFUSE interface functions.

PS eFUSE interface functions.

Parameters

InstancePtr

- Pointer to the PsEfuseHandle which describes which PS eFUSE bit should be burned.

Returns

• XST_SUCCESS.
• In case of error, value is as defined in xilskey_utils.h Error value is a combination of Upper 8 bit value and Lower 8 bit value. For example, 0x8A03 should be checked in error.h as 0x8A00 and 0x03. Upper 8 bit value signifies the major error and lower 8 bit values tells more precisely.

Note

When called, this Initializes the timer, XADC subsystems. Unlocks the PS eFUSE controller.Configures the PS eFUSE controller. Writes the hash and control bits if requested. Programs the PS eFUSE to enable the RSA authentication if requested. Locks the PS eFUSE controller. Returns an error, if the reference clock frequency is not in between 20 and 60 MHz or if the system not in a position to write the requested PS eFUSE bits (because the bits are already written or not allowed to write) or if the temperature and voltage are not within range

Check the variables

XAdc Initialization

Unlock the eFUSE controller

Check if the controller is unlocked

If eFUSE Array is write protected no more writes are possible

Configure the eFUSE controller with mode, strobe width values.

Enable Programming, write and read

Initialize the timer for delay while programming the eFUSE

Program the eFUSE based on the structure values

Program the eFUSE bit 0xA to enable ROM 128K CRC

Program the RSA key Hash value in eFUSE Array \

Check if all the hash eFUSE bits are zero or not

Program the RSA hash

Program the eFUSE bit 0xB to enable RSA authentication

Program the eFUSE bit 0x8,0x9 to enable eFUSE Array Write Protection

Once enabled the write protection, we will not be able to program any PS eFUSE afterwards

SLCR reset is required for write protect to take into effect

Disable Programming, write and read

Lock the eFUSE controller

References XilSKey_Efuse_StartTimer(), XilSKey_EfusePs_ControllerConfig(), XilSKey_EfusePs_ControllerSetReadWriteEnable(), XilSKey_EfusePs_IsEfuseWriteProtected, XilSKey_EfusePs_XAdcInit(), XilSKey_Timer_Intialise(), XSK_EFUSEPS_APB_DFT_JTAG_DISABLE, XSK_EFUSEPS_APB_DFT_MODE_DISABLE, XSK_EFUSEPS_APB_ROM_128K_CRC_ENABLE, XSK_EFUSEPS_APB_RSA_AUTH_ENABLE, XSK_EFUSEPS_APB_WRITE_PROTECTION_ADDR_1, XSK_EFUSEPS_APB_WRITE_PROTECTION_ADDR_2, XSK_EFUSEPS_CONTROLER_LOCK, XSK_EFUSEPS_CONTROLER_LOCK_STATUS, XSK_EFUSEPS_CONTROLER_UNLOCK, XSK_EFUSEPS_ENABLE_PROGRAMMING, XSK_EFUSEPS_ERROR_CONTROLLER_CONFIG, XSK_EFUSEPS_ERROR_CONTROLLER_LOCK, XSK_EFUSEPS_ERROR_EFUSE_WRITE_PROTECTED, XSK_EFUSEPS_ERROR_PS_PARAMETER_WRONG, XSK_EFUSEPS_ERROR_PS_STRUCT_NULL, XSK_EFUSEPS_ERROR_READ_HASH_BEFORE_PROGRAMMING, XSK_EFUSEPS_ERROR_WRITE_128K_CRC_BIT, XSK_EFUSEPS_ERROR_WRITE_RSA_AUTH_BIT, XSK_EFUSEPS_ERROR_WRITE_RSA_HASH, XSK_EFUSEPS_ERROR_WRITE_WRITE_PROTECT_BIT, XSK_EFUSEPS_ERROR_WRTIE_DFT_JTAG_DIS_BIT, XSK_EFUSEPS_ERROR_WRTIE_DFT_MODE_DIS_BIT, XSK_EFUSEPS_ERROR_XADC_INIT, XSK_EFUSEPS_READ_MODE_NORMAL, and XSK_EFUSEPS_SINGLE_MODE.

Referenced by main().