xilfpga
Vitis Drivers API Documentation
File List
Here is a list of all documented files with brief descriptions:
o*xfpga_load_bitstream_example.cThis file contains the example using Xilfpga library to transfer the user provided Bitstream into zynqmp pl region
o*xfpga_partialbitstream_load_example.cPartial reconfiguration(PR) is the ability for a portion of an FPGA to be reprogrammed while the remainder of the system stays unchanged
o*xfpga_readback_example.cThis example prints out the fpga configuration data
o*xfpga_reg_readback_example.cThis example prints out the values of all the configuration registers in the FPGA
o*xilfpga.c
o*xilfpga.h
o*xilfpga_ipi_pcap.cThis file contains the definitions of bitstream loading functions
o*xilfpga_pcap.c
o*xilfpga_pcap.h
o*xilfpga_pcap_common.h
o*xilfpga_versal.c
\*xilfpga_versal.h