This file implements the AMD CFI Version of the XFlash Library.
- Note
- Special consideration has to be given to varying data bus widths. To boost performance, multiple devices in parallel on the data bus are accessed in parallel. Therefore to reduce complexity and increase performance, many local primitive functions are duplicated with the only difference being the width of writes to the devices.
Even with the performance boosting optimizations, the overhead associated is rather high due to the general purpose nature of its design.
Flash block erasing is a time consuming operation with nearly all latency occurring due to the devices' themselves. It takes on the order of 1 second to erase each block.
Writes by comparison are much quicker so library overhead becomes an issue. The write algorithm has been optimized for bulk data programming and should provide relatively better performance.
- This library and the underlying AMD flash memory does not allow re- programming while code is executing from the same memory.
- If hardware is flakey or fails, then this library could hang a thread of execution.
- This library is only tested on M29DW323DT device in 8 bit and 16 bit mode of operation.
MODIFICATION HISTORY:
Ver Who Date Changes
1.01a ksu 04/10/08 First release.
1.02a ksu 06/16/09 Added Reset Bank function
Added bank(s) reset operation at the top of the read
function
Fixed memory corruption issue in 16 bit read operation
2.01a ktn 03/31/10 Updated to support uniform sector WP modes.
2.02a sdm 07/07/10 Updated XFlashAmd_Initialize() to NOT change the erase
region information of a top boot device, when the number
of erase regions is not more than 1.
4.1 nsk 06/06/12 Updated Spansion WriteBuffer programming.
(CR 781697).
4.7 akm 07/10/19 Updated XFlashAmd_Write() to use adjusted base address
in write operation(CR-1029074).
4.7 akm 07/23/19 Initialized Status variable to XST_FAILURE.
4.10 akm 07/14/23 Added support for system device-tree flow.