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mmidp
Vitis Drivers API Documentation
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mmidp
Vitis Drivers API Documentation
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Functions | |
| void | XMmiDp_FastLinkTrainEnable (XMmiDp *InstancePtr) |
| This function enables fast link training in the core controller. More... | |
| void | XMmiDp_FastLinkTrainDisable (XMmiDp *InstancePtr) |
| This function disables fast link training in the core controller. More... | |
| u32 | XMmiDp_GetRxMaxLaneCount (XMmiDp *InstancePtr) |
| This function gets the max lane count supported from DPCD. More... | |
| u32 | XMmiDp_GetRxMaxLinkRate (XMmiDp *InstancePtr) |
| This function gets the max link rate supported from Rx DPCD register. More... | |
| u32 | XMmiDp_StartLinkXmit (XMmiDp *InstancePtr) |
| This function initates link training sequence with the Rx. More... | |
| u32 | XMmiDp_SetSinkDpcdLinkCfgField (XMmiDp *InstancePtr) |
| This function configures DPCD Rx Field. More... | |
| void | XDpPSu14_EnableCctlEnhanceFraming (XMmiDp *InstancePtr) |
| This function configures CCTL enhance framing enable bit. More... | |
| void | XDpPSu14_DisableCctlEnhanceFraming (XMmiDp *InstancePtr) |
| This function configures CCTL enhance framing enable bit. More... | |
| void | XMmiDp_GetDpcdTrainingAuxRdInterval (XMmiDp *InstancePtr) |
| This function reads Training Aux Read Interval register of sink DPCD. More... | |
| u32 | XMmiDp_GetTrainingDelay (XMmiDp *InstancePtr) |
| This function returngs the training aux interval. More... | |
| u32 | XMmiDp_GetDpcdLaneStatusAdjReqs (XMmiDp *InstancePtr) |
| This function will do a burst AUX read from the RX device over the AUX channel. More... | |
| u32 | XMmiDp_CheckClockRecovery (XMmiDp *InstancePtr, u8 LaneCount) |
| This function checks if the RX device's DisplayPort Configuration Data (DPCD) indicates that the clock recovery sequence during link training was successful - the RX device's link clock and data recovery unit has realized and maintained the frequency lock for all lanes currently in use. More... | |
| u32 | XMmiDp_AdjVswingPreemp (XMmiDp *InstancePtr) |
| This function reads the adjusted voltage swing and pre-emphasis level settings from the Rx DPCD register and modify the drive settings accordingly during link training. More... | |
| void | XMmiDp_SetVswingPreemp (XMmiDp *InstancePtr, u8 *AuxData) |
| This function sets current voltage swing and pre-emphasis level settings from the LinkConfig structure to Phy and DPCD. More... | |
| u32 | XMmiDp_SetTrainingPattern (XMmiDp *InstancePtr, XMmiDp_PhyTrainingPattern Pattern) |
| This function sets the training pattern to be used during link training for both the DisplayPort TX core and the RX device. More... | |
| u32 | XMmiDp_SetLinkRate (XMmiDp *InstancePtr, XMmiDp_PhyRate LinkRate) |
| This function sets the Rx Dpcd link rate as well as Phy link rate. More... | |
| void | XMmiDp_SetLaneCount (XMmiDp *InstancePtr, XMmiDp_PhyLanes LaneCount) |
| This function sets the Rx Dpcd lane count as well as Phy lane count. More... | |
| XMmiDp_TrainingState | XMmiDp_TrainingStateClockRecovery (XMmiDp *InstancePtr) |
| This function runs the clock recovery sequence as part of link training. More... | |
| XMmiDp_TrainingState | XMmiDp_TrainingStateAdjustLinkRate (XMmiDp *InstancePtr) |
| This function is reached if either the clock recovery or the channel equalization process failed during training. More... | |
| XMmiDp_TrainingState | XMmiDp_TrainingStateAdjustLaneCount (XMmiDp *InstancePtr) |
| This function is reached if either the clock recovery or the channel equalization process failed during training, and a minimal data rate of 1.62 Gbps was being used. More... | |
| void | XMmiDp_GetDpcdMaxDownspread (XMmiDp *InstancePtr) |
| This function reads Rx DPCD MaxDownspread register bits. More... | |
| void | XMmiDp_GetDpcdRev (XMmiDp *InstancePtr) |
| This function reads Rx DPCD revision number. More... | |
| u32 | XMmiDp_GetRxCapabilities (XMmiDp *InstancePtr) |
| This function reads Rx DPCD capability registers to initiate link training. More... | |
| u32 | XMmiDp_CheckChannelEqualization (XMmiDp *InstancePtr, u8 LaneCount) |
| This function checks if the RX device's DisplayPort Configuration Data (DPCD) indicates that the channel equalization sequence during link training was successful - the RX device has achieved channel equalization, symbol lock, and interlane alignment for all lanes currently in use. More... | |
| XMmiDp_TrainingState | XMmiDp_TrainingStateChannelEqualization (XMmiDp *InstancePtr) |
| This function runs the channel equalization sequence as part of link training. More... | |
| u32 | XMmiDp_CheckLinkStatus (XMmiDp *InstancePtr, u8 LaneCount) |
| This function checks if the Rx DisplayPort Configuration Data (DPCD) indicates the receiver has achieved and maintained clock recovery, channel equalization, symbol lock, and interlane alignment for all lanes currently in use. More... | |
| u32 | XMmiDp_RunTraining (XMmiDp *InstancePtr) |
| This function runs the link training process. More... | |