Overview

Data Structures
struct	XHdcp22_Cipher_Dp_Config
	This typedef contains configuration information for the HDCP22 Cipher core. More...
struct	XHdcp22_Cipher_Dp
	The XHdcp22 Cipher driver instance data. More...

Macros
#define	XHDCP22_CIPHER_H
	< Prevent circular inclusions by using protection macros More...
#define	XHdcp22Cipher_Dp_Enable(InstancePtr)
	This macro enables the HDCP22 Cipher peripheral. More...
#define	XHdcp22Cipher_Dp_Disable(InstancePtr)
	This macro disables the HDCP22 Cipher peripheral. More...
#define	XHdcp22Cipher_Dp_IsEnabled(InstancePtr)
	This macro returns the encrypted enabled state of the HDCP22 Cipher core instance. More...
#define	XHdcp22Cipher_Dp_SetTxMode(InstancePtr)
	This macro sets the HDCP operation mode for the HDCP22 Cipher peripheral. More...
#define	XHdcp22Cipher_Dp_SetRxMode(InstancePtr)
	This macro sets the HDCP RX operation mode for the HDCP22 Cipher peripheral. More...
#define	XHdcp22Cipher_Dp_EnableTxEncryption(InstancePtr)
	This macro enables HDCP TX encryption for the HDCP22 Cipher peripheral. More...
#define	XHdcp22Cipher_Dp_DisableTxEncryption(InstancePtr)
	This macro disables HDCP TX encryption for the HDCP22 Cipher peripheral. More...
#define	XHdcp22Cipher_Dp_IsTxEncryptionEnabled(InstancePtr)
	This macro returns the encrypted enabled state of HDCP TX encryption for the HDCP22 Cipher peripheral. More...
#define	XHdcp22Cipher_Dp_IsEncrypted(InstancePtr)
	This macro returns the encrypted state for the HDCP22 Cipher peripheral. More...
#define	XHdcp22Cipher_Dp_Noise(InstancePtr, Set)
	This macro enables or disables noise output for the HDCP22 Cipher peripheral. More...
#define	XHdcp22Cipher_Dp_Blank(InstancePtr, Set)
	This macro enables or disables blank screen for the HDCP22 Cipher peripheral. More...
#define	XHdcp22Cipher_Dp_GetVersion(InstancePtr)   XHdcp22Cipher_Dp_ReadReg((InstancePtr)->Config.BaseAddress, XHDCP22_CIPHER_VER_VERSION_OFFSET)
	This macro reads the version for the HDCP22 Cipher peripheral. More...
#define	XHDCP22_CIPHER_DP_HW_H
	< Prevent circular inclusions by using protection macros More...
#define	XHDCP22_CIPHER_VER_ID_OFFSET   ((XHDCP22_CIPHER_VER_BASE)+(0*4))
	VER Identification register * register offset. More...
#define	XHDCP22_CIPHER_VER_VERSION_OFFSET   ((XHDCP22_CIPHER_VER_BASE)+(1*4))
	VER Version register * offset. More...
#define	XHDCP22_CIPHER_REG_CTRL_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(0*4))
	Control register * register offset. More...
#define	XHDCP22_CIPHER_REG_CTRL_SET_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(1*4))
	Control set register * offset. More...
#define	XHDCP22_CIPHER_REG_CTRL_CLR_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(2*4))
	Control clear register * offset. More...
#define	XHDCP22_CIPHER_REG_STA_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(3*4))
	Status register * offset. More...
#define	XHDCP22_CIPHER_REG_KS_1_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(4*4))
	Ks register 1 * offset. More...
#define	XHDCP22_CIPHER_REG_KS_2_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(5*4))
	Ks register 2 * offset. More...
#define	XHDCP22_CIPHER_REG_KS_3_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(6*4))
	Ks register 3 * offset. More...
#define	XHDCP22_CIPHER_REG_KS_4_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(7*4))
	Ks register 4 * offset. More...
#define	XHDCP22_CIPHER_REG_LC128_1_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(8*4))
	Lc128 register 1 * offset. More...
#define	XHDCP22_CIPHER_REG_LC128_2_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(9*4))
	Lc128 register 2 * offset. More...
#define	XHDCP22_CIPHER_REG_LC128_3_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(10*4))
	Lc128 register 3 * offset. More...
#define	XHDCP22_CIPHER_REG_LC128_4_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(11*4))
	Lc128 register 4 * offset. More...
#define	XHDCP22_CIPHER_REG_RIV_1_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(12*4))
	Riv register 1 * offset. More...
#define	XHDCP22_CIPHER_REG_RIV_2_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(13*4))
	Riv register 2 * offset. More...
#define	XHDCP22_CIPHER_REG_INPUTCTR_1_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(14*4))
	InputCtr register 1 * offset. More...
#define	XHDCP22_CIPHER_REG_INPUTCTR_2_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(15*4))
	InputCtr register 2 * offset. More...
#define	XHDCP22_CIPHER_REG_CTRL_RUN_MASK   (1<<0)
	Control register Run mask. More...
#define	XHDCP22_CIPHER_REG_CTRL_IE_MASK   (1<<1)
	Control register Interrupt Enable mask. More...
#define	XHDCP22_CIPHER_REG_CTRL_MODE_MASK   (1<<2)
	Control register Mode mask. More...
#define	XHDCP22_CIPHER_REG_CTRL_ENCRYPT_MASK   (1<<3)
	Control register Encrypt mask. More...
#define	XHDCP22_CIPHER_REG_CTRL_BLANK_MASK   (1<<4)
	Control register blank mask. More...
#define	XHDCP22_CIPHER_REG_CTRL_NOISE_MASK   (1<<5)
	Control register noise mask. More...
#define	XHDCP22_CIPHER_REG_CTRL_LANE_CNT_MASK   (0x0F<<6)
	Control register lane count mask. More...
#define	XHDCP22_CIPHER_REG_CTRL_LANE_CNT_BIT_POS   6
	Control register lane count bits position. More...
#define	XHDCP22_CIPHER_REG_STA_IRQ_MASK   (1<<0)
	Status register interrupt mask. More...
#define	XHDCP22_CIPHER_REG_STA_EVT_MASK   (1<<1)
	Status register event mask. More...
#define	XHDCP22_CIPHER_REG_STA_ENCRYPTED_MASK   (1<<2)
	Status register encrypted mask. More...
#define	XHDCP22_CIPHER_SHIFT_16   16
	16 shift value More...
#define	XHDCP22_CIPHER_MASK_16   0xFFFF
	16 bit mask value More...
#define	XHDCP22_CIPHER_VER_ID   0x2200
	Version ID. More...

Functions
int	XHdcp22Cipher_Dp_CfgInitialize (XHdcp22_Cipher_Dp *InstancePtr, XHdcp22_Cipher_Dp_Config *CfgPtr, UINTPTR EffectiveAddr)
	This function initializes the HDCP22 Cipher core. More...
void	XHdcp22Cipher_Dp_SetKs (XHdcp22_Cipher_Dp *InstancePtr, const u8 *KsPtr, u16 Length)
	This function sets the Ks key in the HDCP22 Cipher core. More...
void	XHdcp22Cipher_Dp_SetLc128 (XHdcp22_Cipher_Dp *InstancePtr, const u8 *Lc128Ptr, u16 Length)
	This function sets the Lc128 key in the HDCP22 Cipher core. More...
void	XHdcp22Cipher_Dp_SetRiv (XHdcp22_Cipher_Dp *InstancePtr, const u8 *RivPtr, u16 Length)
	This function sets the Riv key in the HDCP22 Cipher core. More...
void	XHdcp22Cipher_Dp_SetLanecount (XHdcp22_Cipher_Dp *InstancePtr, u8 LaneCount)
	This function sets the Lane count in the HDCP22 Cipher core. More...
XHdcp22_Cipher_Dp_Config *	XHdcp22Cipher_Dp_LookupConfig (u16 DeviceId)
	This function returns a reference to an XHdcp22_Cipher_Dp_Config structure based on the core id, DeviceId. More...
int	XHdcp22Cipher_Dp_SelfTest (XHdcp22_Cipher_Dp *InstancePtr)
	This function reads ID of the peripheral. More...

Register access macro definition
#define	XHdcp22Cipher_Dp_In32   Xil_In32
	Input Operations. More...
#define	XHdcp22Cipher_Dp_Out32   Xil_Out32
	Output Operations. More...
#define	XHdcp22Cipher_Dp_ReadReg(BaseAddress, RegOffset)   XHdcp22Cipher_Dp_In32((BaseAddress) + ((u32)RegOffset))
	This macro reads a value from a HDCP22 Cipher register. More...
#define	XHdcp22Cipher_Dp_WriteReg(BaseAddress, RegOffset, Data)   XHdcp22Cipher_Dp_Out32((BaseAddress) + ((u32)RegOffset), (u32)(Data))
	This macro writes a value to a HDCP22 Cipher register. More...
#define	XHdcp22Cipher_Dp_GetStatusReg(BaseAddress)   XHdcp22Cipher_Dp_ReadReg(BaseAddress, XHDCP22_CIPHER_REG_STA_OFFSET)
	This macro reads the status register from the HDCP22 Cipher. More...
#define	XHdcp22Cipher_Dp_GetControlReg(BaseAddress)   XHdcp22Cipher_Dp_ReadReg(BaseAddress, XHDCP22_CIPHER_REG_CTRL_OFFSET)
	This macro reads the control register from the HDCP22 Cipher. More...

Macro Definition Documentation

#define XHDCP22_CIPHER_DP_HW_H

< Prevent circular inclusions by using protection macros

#define XHDCP22_CIPHER_H

< Prevent circular inclusions by using protection macros

#define XHDCP22_CIPHER_MASK_16   0xFFFF

16 bit mask value

Referenced by XHdcp22Cipher_Dp_CfgInitialize(), and XHdcp22Cipher_Dp_SelfTest().

#define XHDCP22_CIPHER_REG_CTRL_BLANK_MASK   (1<<4)

Control register blank mask.

#define XHDCP22_CIPHER_REG_CTRL_CLR_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(2*4))

Control clear register * offset.

Referenced by XHdcp22Cipher_Dp_SetLanecount().

#define XHDCP22_CIPHER_REG_CTRL_ENCRYPT_MASK   (1<<3)

Control register Encrypt mask.

#define XHDCP22_CIPHER_REG_CTRL_IE_MASK   (1<<1)

Control register Interrupt Enable mask.

Reserved for future use.

#define XHDCP22_CIPHER_REG_CTRL_LANE_CNT_BIT_POS   6

Control register lane count bits position.

Referenced by XHdcp22Cipher_Dp_SetLanecount().

#define XHDCP22_CIPHER_REG_CTRL_LANE_CNT_MASK   (0x0F<<6)

Control register lane count mask.

Referenced by XHdcp22Cipher_Dp_SetLanecount().

#define XHDCP22_CIPHER_REG_CTRL_MODE_MASK   (1<<2)

Control register Mode mask.

#define XHDCP22_CIPHER_REG_CTRL_NOISE_MASK   (1<<5)

Control register noise mask.

#define XHDCP22_CIPHER_REG_CTRL_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(0*4))

Control register * register offset.

#define XHDCP22_CIPHER_REG_CTRL_RUN_MASK   (1<<0)

Control register Run mask.

#define XHDCP22_CIPHER_REG_CTRL_SET_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(1*4))

Control set register * offset.

Referenced by XHdcp22Cipher_Dp_SetLanecount().

#define XHDCP22_CIPHER_REG_INPUTCTR_1_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(14*4))

InputCtr register 1 * offset.

#define XHDCP22_CIPHER_REG_INPUTCTR_2_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(15*4))

InputCtr register 2 * offset.

#define XHDCP22_CIPHER_REG_KS_1_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(4*4))

Ks register 1 * offset.

Referenced by XHdcp22Cipher_Dp_SetKs().

#define XHDCP22_CIPHER_REG_KS_2_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(5*4))

Ks register 2 * offset.

#define XHDCP22_CIPHER_REG_KS_3_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(6*4))

Ks register 3 * offset.

#define XHDCP22_CIPHER_REG_KS_4_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(7*4))

Ks register 4 * offset.

#define XHDCP22_CIPHER_REG_LC128_1_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(8*4))

Lc128 register 1 * offset.

Referenced by XHdcp22Cipher_Dp_SetLc128().

#define XHDCP22_CIPHER_REG_LC128_2_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(9*4))

Lc128 register 2 * offset.

#define XHDCP22_CIPHER_REG_LC128_3_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(10*4))

Lc128 register 3 * offset.

#define XHDCP22_CIPHER_REG_LC128_4_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(11*4))

Lc128 register 4 * offset.

#define XHDCP22_CIPHER_REG_RIV_1_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(12*4))

Riv register 1 * offset.

Referenced by XHdcp22Cipher_Dp_SetRiv().

#define XHDCP22_CIPHER_REG_RIV_2_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(13*4))

Riv register 2 * offset.

#define XHDCP22_CIPHER_REG_STA_ENCRYPTED_MASK   (1<<2)

Status register encrypted mask.

#define XHDCP22_CIPHER_REG_STA_EVT_MASK   (1<<1)

Status register event mask.

Reserved for future use.

#define XHDCP22_CIPHER_REG_STA_IRQ_MASK   (1<<0)

Status register interrupt mask.

Reserved for future use.

#define XHDCP22_CIPHER_REG_STA_OFFSET   ((XHDCP22_CIPHER_REG_BASE)+(3*4))

Status register * offset.

#define XHDCP22_CIPHER_SHIFT_16   16

16 shift value

Referenced by XHdcp22Cipher_Dp_CfgInitialize(), and XHdcp22Cipher_Dp_SelfTest().

#define XHDCP22_CIPHER_VER_ID   0x2200

Version ID.

Referenced by XHdcp22Cipher_Dp_CfgInitialize(), and XHdcp22Cipher_Dp_SelfTest().

#define XHDCP22_CIPHER_VER_ID_OFFSET   ((XHDCP22_CIPHER_VER_BASE)+(0*4))

VER Identification register * register offset.

Referenced by XHdcp22Cipher_Dp_CfgInitialize(), and XHdcp22Cipher_Dp_SelfTest().

#define XHDCP22_CIPHER_VER_VERSION_OFFSET   ((XHDCP22_CIPHER_VER_BASE)+(1*4))

VER Version register * offset.

#define XHdcp22Cipher_Dp_Blank	(		InstancePtr,
			Set
	)

Value:

{ \
        if (Set) { \
                XHdcp22Cipher_Dp_WriteReg((InstancePtr)->Config.BaseAddress, (XHDCP22_CIPHER_REG_CTRL_SET_OFFSET), (XHDCP22_CIPHER_REG_CTRL_BLANK_MASK)); \
        } \
        else { \
                XHdcp22Cipher_Dp_WriteReg((InstancePtr)->Config.BaseAddress, (XHDCP22_CIPHER_REG_CTRL_CLR_OFFSET), (XHDCP22_CIPHER_REG_CTRL_BLANK_MASK)); \
        } \
}

This macro enables or disables blank screen for the HDCP22 Cipher peripheral.

Parameters

InstancePtr	is a pointer to the HDCP22 Cipher core instance.
Set	specifies TRUE/FALSE either to enable/disable blank screen.

Returns

none.

Note

C-style signature: void XHdcp22Cipher_Dp_Blank(u32 BaseAddress, u8 Set)

#define XHdcp22Cipher_Dp_Disable

(

InstancePtr

)

Value:

XHdcp22Cipher_Dp_WriteReg((InstancePtr)->Config.BaseAddress, \
        (XHDCP22_CIPHER_REG_CTRL_CLR_OFFSET), (XHDCP22_CIPHER_REG_CTRL_RUN_MASK))

This macro disables the HDCP22 Cipher peripheral.

Parameters

InstancePtr

is a pointer to the HDCP22 Cipher core instance.

Returns

None.

Note

C-style signature: void XHdcp22Cipher_Dp_Disable(u32 BaseAddress)

#define XHdcp22Cipher_Dp_DisableTxEncryption

(

InstancePtr

)

Value:

XHdcp22Cipher_Dp_WriteReg((InstancePtr)->Config.BaseAddress, \
        (XHDCP22_CIPHER_REG_CTRL_CLR_OFFSET), (XHDCP22_CIPHER_REG_CTRL_ENCRYPT_MASK))

This macro disables HDCP TX encryption for the HDCP22 Cipher peripheral.

Parameters

InstancePtr

is a pointer to the HDCP22 Cipher core instance.

Returns

None.

Note

C-style signature: void XHdcp22Cipher_Dp_DisableTxEncryption(u32 BaseAddress)

#define XHdcp22Cipher_Dp_Enable

(

InstancePtr

)

Value:

XHdcp22Cipher_Dp_WriteReg((InstancePtr)->Config.BaseAddress, \
        (XHDCP22_CIPHER_REG_CTRL_SET_OFFSET),(XHDCP22_CIPHER_REG_CTRL_RUN_MASK))

This macro enables the HDCP22 Cipher peripheral.

Parameters

InstancePtr

is a pointer to the HDCP22 Cipher core instance.

Returns

None.

Note

C-style signature: void XHdcp22Cipher_Dp_Enable(u32 BaseAddress)

#define XHdcp22Cipher_Dp_EnableTxEncryption

(

InstancePtr

)

Value:

XHdcp22Cipher_Dp_WriteReg((InstancePtr)->Config.BaseAddress, \
        (XHDCP22_CIPHER_REG_CTRL_SET_OFFSET), (XHDCP22_CIPHER_REG_CTRL_ENCRYPT_MASK))

This macro enables HDCP TX encryption for the HDCP22 Cipher peripheral.

Parameters

InstancePtr

is a pointer to the HDCP22 Cipher core instance.

Returns

None.

Note

C-style signature: void XHdcp22Cipher_Dp_EnableTxEncryption(u32 BaseAddress)

#define XHdcp22Cipher_Dp_GetControlReg

(

BaseAddress

)

XHdcp22Cipher_Dp_ReadReg(BaseAddress, XHDCP22_CIPHER_REG_CTRL_OFFSET)

This macro reads the control register from the HDCP22 Cipher.

Parameters

BaseAddress

is the base address of the HDCP22 Cipher core instance.

Returns

A 32-bit value representing the contents of the control register.

Note

C-style signature: u32 XHdcp22Cipher_GetStatusReg(u32 BaseAddress)

#define XHdcp22Cipher_Dp_GetStatusReg

(

BaseAddress

)

XHdcp22Cipher_Dp_ReadReg(BaseAddress, XHDCP22_CIPHER_REG_STA_OFFSET)

This macro reads the status register from the HDCP22 Cipher.

Parameters

IBaseAddress

is the base address of the HDCP22 Cipher core instance.

Returns

A 32-bit value representing the contents of the status register.

Note

C-style signature: u32 XHdcp22Cipher_GetStatusReg(u32 BaseAddress)

#define XHdcp22Cipher_Dp_GetVersion

(

InstancePtr

)

XHdcp22Cipher_Dp_ReadReg((InstancePtr)->Config.BaseAddress, XHDCP22_CIPHER_VER_VERSION_OFFSET)

This macro reads the version for the HDCP22 Cipher peripheral.

Parameters

InstancePtr

is a pointer to the HDCP22 Cipher core instance.

Returns

version.

Note

C-style signature: void XHdcp22Cipher_GetVersion(u32 BaseAddress)

#define XHdcp22Cipher_Dp_In32   Xil_In32

Input Operations.

#define XHdcp22Cipher_Dp_IsEnabled

(

InstancePtr

)

Value:

((XHdcp22Cipher_Dp_GetControlReg((InstancePtr)->Config.BaseAddress)\
        & XHDCP22_CIPHER_REG_CTRL_RUN_MASK) ==  XHDCP22_CIPHER_REG_CTRL_RUN_MASK)

This macro returns the encrypted enabled state of the HDCP22 Cipher core instance.

Parameters

InstancePtr

is a pointer to the HDCP22 Cipher core instance.

Returns

TRUE if HDCP22 cipher is enabled, FALSE otherwise.

Note

C-style signature: u32 XHdcp22Cipher_Dp_IsEnabled(u32 BaseAddress)

#define XHdcp22Cipher_Dp_IsEncrypted

(

InstancePtr

)

Value:

((XHdcp22Cipher_Dp_GetStatusReg((InstancePtr)->Config.BaseAddress) \
        & XHDCP22_CIPHER_REG_STA_ENCRYPTED_MASK) ==  XHDCP22_CIPHER_REG_STA_ENCRYPTED_MASK)

This macro returns the encrypted state for the HDCP22 Cipher peripheral.

Parameters

InstancePtr

is a pointer to the HDCP22 Cipher core instance.

Returns

TRUE if the frame is encrypted, FALSE otherwise.

Note

C-style signature: void XHdcp22Cipher_Dp_DisableTxEncryption(u32 BaseAddress)

#define XHdcp22Cipher_Dp_IsTxEncryptionEnabled

(

InstancePtr

)

Value:

((XHdcp22Cipher_Dp_GetControlReg((InstancePtr)->Config.BaseAddress)\
        & XHDCP22_CIPHER_REG_CTRL_ENCRYPT_MASK) ==  XHDCP22_CIPHER_REG_CTRL_ENCRYPT_MASK)

This macro returns the encrypted enabled state of HDCP TX encryption for the HDCP22 Cipher peripheral.

Parameters

InstancePtr

is a pointer to the HDCP22 Cipher core instance.

Returns

TRUE if HDCP22 TX encryption is enabled, FALSE otherwise.

Note

C-style signature: u32 XHdcp22Cipher_Dp_IsTxEncryptionEnabled(u32 BaseAddress)

#define XHdcp22Cipher_Dp_Noise	(		InstancePtr,
			Set
	)

Value:

{ \
        if (Set) { \
                XHdcp22Cipher_Dp_WriteReg((InstancePtr)->Config.BaseAddress, (XHDCP22_CIPHER_REG_CTRL_SET_OFFSET), (XHDCP22_CIPHER_REG_CTRL_NOISE_MASK)); \
        } \
        else { \
                XHdcp22Cipher_Dp_WriteReg((InstancePtr)->Config.BaseAddress, (XHDCP22_CIPHER_REG_CTRL_CLR_OFFSET), (XHDCP22_CIPHER_REG_CTRL_NOISE_MASK)); \
        } \
}

This macro enables or disables noise output for the HDCP22 Cipher peripheral.

Parameters

InstancePtr	is a pointer to the HDCP22 Cipher core instance.
Set	specifies TRUE/FALSE either to enable/disable noise output.

Returns

none.

Note

C-style signature: void XHdcp22Cipher_Dp_Noise(u32 BaseAddress, u8 Set)

#define XHdcp22Cipher_Dp_Out32   Xil_Out32

Output Operations.

#define XHdcp22Cipher_Dp_ReadReg	(		BaseAddress,
			RegOffset
	)		XHdcp22Cipher_Dp_In32((BaseAddress) + ((u32)RegOffset))

This macro reads a value from a HDCP22 Cipher register.

A 32 bit read is performed. If the component is implemented in a smaller width, only the least significant data is read from the register. The most significant data will be read as 0.

Parameters

BaseAddress	is the base address of the HDCP22 Cipher core instance.
RegOffset	is the register offset of the register (defined at the top of this file).

Returns

The 32-bit value of the register.

Note

C-style signature: u32 XHdcp22Cipher_ReadReg(u32 BaseAddress, u32 RegOffset)

Referenced by XHdcp22Cipher_Dp_CfgInitialize(), and XHdcp22Cipher_Dp_SelfTest().

#define XHdcp22Cipher_Dp_SetRxMode

(

InstancePtr

)

Value:

XHdcp22Cipher_Dp_WriteReg((InstancePtr)->Config.BaseAddress, \
        (XHDCP22_CIPHER_REG_CTRL_SET_OFFSET), (XHDCP22_CIPHER_REG_CTRL_MODE_MASK))

This macro sets the HDCP RX operation mode for the HDCP22 Cipher peripheral.

Parameters

InstancePtr

is a pointer to the HDCP22 Cipher core instance.

Returns

None.

Note

C-style signature: void XHdcp22Cipher_Dp_SetRxMode(u32 BaseAddress)

#define XHdcp22Cipher_Dp_SetTxMode

(

InstancePtr

)

Value:

XHdcp22Cipher_Dp_WriteReg((InstancePtr)->Config.BaseAddress, \
        (XHDCP22_CIPHER_REG_CTRL_CLR_OFFSET), (XHDCP22_CIPHER_REG_CTRL_MODE_MASK))

This macro sets the HDCP operation mode for the HDCP22 Cipher peripheral.

The mode

Parameters

InstancePtr

is a pointer to the HDCP22 Cipher core instance.

Returns

None.

Note

C-style signature: void XHdcp22Cipher_Dp_SetTxMode(u32 BaseAddress)

#define XHdcp22Cipher_Dp_WriteReg	(		BaseAddress,
			RegOffset,
			Data
	)		XHdcp22Cipher_Dp_Out32((BaseAddress) + ((u32)RegOffset), (u32)(Data))

This macro writes a value to a HDCP22 Cipher register.

A 32 bit write is performed. If the component is implemented in a smaller width, only the least significant data is written.

Parameters

BaseAddress	is the base address of the HDCP22 Cipher core instance.
RegOffset	is the register offset of the register (defined at the top of this file) to be written.
Data	is the 32-bit value to write into the register.

Returns

None.

Note

C-style signature: void XHdcp22Cipher_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)

Referenced by XHdcp22Cipher_Dp_SetKs(), XHdcp22Cipher_Dp_SetLanecount(), XHdcp22Cipher_Dp_SetLc128(), and XHdcp22Cipher_Dp_SetRiv().

Function Documentation

int XHdcp22Cipher_Dp_CfgInitialize	(	XHdcp22_Cipher_Dp *	InstancePtr,
		XHdcp22_Cipher_Dp_Config *	CfgPtr,
		UINTPTR	EffectiveAddr
	)

This function initializes the HDCP22 Cipher core.

This function must be called prior to using the HDCP22 Cipher core. Initialization of the HDCP22 Cipher includes setting up the instance data, and ensuring the hardware is in a quiescent state.

Parameters

InstancePtr	is a pointer to the XHdcp22_Cipher_Dp core instance.
CfgPtr	points to the configuration structure associated with the HDCP22 Cipher core core.
EffectiveAddr	is the base address of the device. If address translation is being used, then this parameter must reflect the virtual base address. Otherwise, the physical address should be used.

Returns

• XST_SUCCESS if XHdcp22Cipher_CfgInitialize was successful.
• XST_FAILURE if HDCP22 Cipher ID mismatched.

Note

None.

References XHdcp22_Cipher_Dp_Config::BaseAddress, XHdcp22_Cipher_Dp::Config, XHdcp22_Cipher_Dp::IsReady, XHDCP22_CIPHER_MASK_16, XHDCP22_CIPHER_SHIFT_16, XHDCP22_CIPHER_VER_ID, XHDCP22_CIPHER_VER_ID_OFFSET, and XHdcp22Cipher_Dp_ReadReg.

XHdcp22_Cipher_Dp_Config * XHdcp22Cipher_Dp_LookupConfig

(

u16

DeviceId

)

This function returns a reference to an XHdcp22_Cipher_Dp_Config structure based on the core id, DeviceId.

The return value will refer to an entry in the device configuration table defined in the xhdcp22_cipher_dp_g.c file.

Parameters

DeviceId

is the unique core ID of the XHDCP22 Cipher core for the lookup operation.

Returns

XHdcp22Cipher_LookupConfig returns a reference to a config record in the configuration table (in xhdcp22_cipher_dp_g.c) corresponding to DeviceId, or NULL if no match is found.

Note

None.

int XHdcp22Cipher_Dp_SelfTest

(

XHdcp22_Cipher_Dp *

InstancePtr

)

This function reads ID of the peripheral.

Parameters

InstancePtr

is a pointer to the HDCP22 Cipher core instance.

Returns

• XST_SUCCESS if ID was matched.
• XST_FAILURE if ID was mismatched.

Note

None.

References XHdcp22_Cipher_Dp_Config::BaseAddress, XHdcp22_Cipher_Dp::Config, XHDCP22_CIPHER_MASK_16, XHDCP22_CIPHER_SHIFT_16, XHDCP22_CIPHER_VER_ID, XHDCP22_CIPHER_VER_ID_OFFSET, and XHdcp22Cipher_Dp_ReadReg.

void XHdcp22Cipher_Dp_SetKs	(	XHdcp22_Cipher_Dp *	InstancePtr,
		const u8 *	KsPtr,
		u16	Length
	)

This function sets the Ks key in the HDCP22 Cipher core.

Parameters

BaseAddress	is the base address of the HDCP22 Cipher core instance.
KsPtr	is a pointer to the Ks key.
Length	indicates the number of bytes.

Returns

None.

Note

The Ks should be in big endian notation.

References XHdcp22_Cipher_Dp_Config::BaseAddress, XHdcp22_Cipher_Dp::Config, XHDCP22_CIPHER_REG_KS_1_OFFSET, and XHdcp22Cipher_Dp_WriteReg.

void XHdcp22Cipher_Dp_SetLanecount	(	XHdcp22_Cipher_Dp *	InstancePtr,
		u8	LaneCount
	)

This function sets the Lane count in the HDCP22 Cipher core.

Parameters

InstancePtr	is the HDCP22 Cipher core instance.
LaneCount	is the number lanes to be set in cipher core.

Returns

None.

References XHdcp22_Cipher_Dp_Config::BaseAddress, XHdcp22_Cipher_Dp::Config, XHDCP22_CIPHER_REG_CTRL_CLR_OFFSET, XHDCP22_CIPHER_REG_CTRL_LANE_CNT_BIT_POS, XHDCP22_CIPHER_REG_CTRL_LANE_CNT_MASK, XHDCP22_CIPHER_REG_CTRL_SET_OFFSET, and XHdcp22Cipher_Dp_WriteReg.

void XHdcp22Cipher_Dp_SetLc128	(	XHdcp22_Cipher_Dp *	InstancePtr,
		const u8 *	Lc128Ptr,
		u16	Length
	)

This function sets the Lc128 key in the HDCP22 Cipher core.

Parameters

BaseAddress	is the base address of the HDCP22 Cipher core instance.
Lc128Ptr	is a pointer to the LC128 key.
Length	indicates the number of bytes.

Returns

None.

Note

The Lc128 should be in big endian notation.

References XHdcp22_Cipher_Dp_Config::BaseAddress, XHdcp22_Cipher_Dp::Config, XHDCP22_CIPHER_REG_LC128_1_OFFSET, and XHdcp22Cipher_Dp_WriteReg.

void XHdcp22Cipher_Dp_SetRiv	(	XHdcp22_Cipher_Dp *	InstancePtr,
		const u8 *	RivPtr,
		u16	Length
	)

This function sets the Riv key in the HDCP22 Cipher core.

Parameters

BaseAddress	is the base address of the HDCP22 Cipher core instance.
RivPtr	is a pointer to the Riv key.
Length	indicates the number of bytes.

Returns

None.

Note

The Riv should be in big endian notation.

References XHdcp22_Cipher_Dp_Config::BaseAddress, XHdcp22_Cipher_Dp::Config, XHDCP22_CIPHER_REG_RIV_1_OFFSET, and XHdcp22Cipher_Dp_WriteReg.