This is main header file of the Xilinx MIPI DSI Rx Subsystem driverMIPI DSI2 Rx Subsystem Overview

MIPI DSI2 Subsystem is collection of IP cores defines high speed serial interface between display peripheral and host processor. DSI Subsystem translate data received from a MIPI DSI Transmitter. The MIPI DSI Rx Subsystem is a plug-in solution for interfacing with MIPI DSI core. It hides all the complexities of programming the underlying cores from the end user.

Subsystem Features

MIPI DSI2 Rx Subsystem supports following features

• Ultrascale+ family support.
• Support for 1 to 4 Data Lanes.
• Line rates ranging from 80 to 2500 Mbps.
• Different data type support(RGB888,RGB565,RGB666L,RGB666P).
• Continuous and non-continuous clock.
• Unidirectional.
• 3 video modes and command mode(Unidirectional supported command).
• 1-bit error correction and 2-bit error detection and CRC.
• Inturrpt generation to indicate subsystem status information.
• Single Virtual Channel.

Subsystem Configurations

The GUI in IPI allows for the following configurations

• Lanes ( 1 to 4 )
• Pixel Format ( (RGB888,RGB566,RGB666L,RGB666P).
• Number of Input Pixels per beat(1, 2, 4)
• DPHY with/without Register interface
• Line Rate
• CRC Generation Enable In order to reduce resource usage, the DPHY can be configured to be without register interface with fixed functions. Static configuration parameters are stored in xdsirxss_g.c file, that gets generated when compiling the board support package (BSP). A table is defined where each entry contains configuration information for the instances of the subsystem in the design. This information includes the elected configuration, sub-cores used and their device ID, base addresses of memory mapped devices and address range available for subsystem frame/field buffers.

The subsystem driver itself always includes the full software stack irrespective of the configuration selected. Generic API's are provided to interact with the subsystem and/or with the included sub -cores. At run-time the subsystem will query the static configuration and configures itself for supported use cases

Subsystem Driver Description

The subsystem driver provides an abstraction on top of the DSI and DPHY drivers.

Interrupt Service

The DSI RX subsytem supports 2 interrupts

1. Unsupported Data Type
2. Pixel Under flow error For Handling these interrupts, The users of this driver have to register this handler with the interrupt system and provide the callback functions by using XDSiRxSsSetCallback API

Threads

This driver is not thread safe. Any needs for threads or thread mutual exclusion must be satisfied by the layer above this driver.

Asserts

Asserts are used within all Xilinx drivers to enforce constraints on argument values. Asserts can be turned off on a system-wide basis by defining, at compile time, the NDEBUG identifier. By default, asserts are turned on and it is recommended that application developers leave asserts on during development.

MODIFICATION HISTORY:

Ver Who Date    Changes



1.0 Kunal 12/02/24 Initial Release for MIPI DSI RX subsystem