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aiengine
Vitis Drivers API Documentation
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This typedef contains the attributes for Tile DMA BD data structure. More...
Data Fields | |
| u32 | RegOff [7U] |
| BD word offset. More... | |
| XAieGbl_RegTileBdAdd | AddA |
| Address A attributes. More... | |
| XAieGbl_RegTileBdAdd | AddB |
| Address B attributes. More... | |
| XAieGbl_RegTileBd2D | Xinc |
| X addressing attributes. More... | |
| XAieGbl_RegTileBd2D | Yinc |
| Y addressing attributes. More... | |
| XAieGbl_RegTileBdPkt | Pkt |
| Packet attributes. More... | |
| XAieGbl_RegTileBdInt | Intlv |
| Interleave attributes. More... | |
| XAieGbl_RegTileBdCtrl | Ctrl |
| Control word attributes. More... | |
This typedef contains the attributes for Tile DMA BD data structure.
| XAieGbl_RegTileBdAdd XAieGbl_RegTileDmaBd::AddA |
Address A attributes.
Referenced by XAieDma_TileBdWrite().
| XAieGbl_RegTileBdAdd XAieGbl_RegTileDmaBd::AddB |
Address B attributes.
Referenced by XAieDma_TileBdWrite().
| XAieGbl_RegTileBdCtrl XAieGbl_RegTileDmaBd::Ctrl |
Control word attributes.
Referenced by XAieDma_TileBdWrite().
| XAieGbl_RegTileBdInt XAieGbl_RegTileDmaBd::Intlv |
Interleave attributes.
Referenced by XAieDma_TileBdWrite().
| XAieGbl_RegTileBdPkt XAieGbl_RegTileDmaBd::Pkt |
Packet attributes.
Referenced by XAieDma_TileBdWrite().
| u32 XAieGbl_RegTileDmaBd::RegOff[7U] |
BD word offset.
Referenced by XAieDma_TileBdWrite().
| XAieGbl_RegTileBd2D XAieGbl_RegTileDmaBd::Xinc |
X addressing attributes.
Referenced by XAieDma_TileBdWrite().
| XAieGbl_RegTileBd2D XAieGbl_RegTileDmaBd::Yinc |
Y addressing attributes.
Referenced by XAieDma_TileBdWrite().