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aiengine
Vitis Drivers API Documentation
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aiengine
Vitis Drivers API Documentation
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This typedef contains the attributes for Shim DMA channel registers. More...
Data Fields | |
| u32 | CtrlOff |
| Control offset. More... | |
| u32 | StatQOff |
| Start BD offset. More... | |
| XAieGbl_RegFldAttr | PzStr |
| Pause stream bit field attributes. More... | |
| XAieGbl_RegFldAttr | PzMem |
| Pause memory bit field attributes. More... | |
| XAieGbl_RegFldAttr | En |
| Enable bit field attributes. More... | |
| XAieGbl_RegFldAttr | StatQ |
| Start BD bit field attributes. More... | |
This typedef contains the attributes for Shim DMA channel registers.
| u32 XAieGbl_RegShimDmaCh::CtrlOff |
Control offset.
| XAieGbl_RegFldAttr XAieGbl_RegShimDmaCh::En |
Enable bit field attributes.
| XAieGbl_RegFldAttr XAieGbl_RegShimDmaCh::PzMem |
Pause memory bit field attributes.
| XAieGbl_RegFldAttr XAieGbl_RegShimDmaCh::PzStr |
Pause stream bit field attributes.
| XAieGbl_RegFldAttr XAieGbl_RegShimDmaCh::StatQ |
Start BD bit field attributes.
| u32 XAieGbl_RegShimDmaCh::StatQOff |
Start BD offset.