| llfifo Vitis Drivers API Documentation

- Overview
- Data Structures
- APIs
- File List
- Examples

Data Structures | Macros | Typedefs | Functions
Overview

## Data Structures
struct | XLlFifo
| This typedef defines a run-time instance of an XLlFifo device. More...
struct | XStrm_RxFifoStreamer
| This typedef defines a run-time instance of a receive byte-streamer. More...
struct | XStrm_TxFifoStreamer
| This typedef defines a run-time instance of a transmit byte-streamer. More...

## Macros
#define | XLlFifo_Reset(InstancePtr)
| XLlFifo_Reset resets both the Tx and Rx channels and the local link interface the FIFO specified by InstancePtr. More...
#define | XLlFifo_Status(InstancePtr) XLlFifo_ReadReg((InstancePtr)->BaseAddress, XLLF_ISR_OFFSET)
| XLlFifo_Status returns a bit mask of the interrupt status register (ISR) for the FIFO specified by InstancePtr. More...
#define | XLlFifo_IntEnable(InstancePtr, Mask)
| XLlFifo_IntEnable enables the interrupts specified in Mask for the FIFO specified by InstancePtr. More...
#define | XLlFifo_IntDisable(InstancePtr, Mask)
| XLlFifo_IntDisable disables the interrupts specified in Mask for the FIFO specified by InstancePtr. More...
#define | XLlFifo_IntPending(InstancePtr)
| XLlFifo_IntPending returns a bit mask of the pending interrupts for the FIFO specified by InstancePtr. More...
#define | XLlFifo_IntClear(InstancePtr, Mask)
| XLlFifo_IntClear clears pending interrupts specified in Mask for the FIFO specified by InstancePtr. More...
#define | XLlFifo_RxReset(InstancePtr)
| XLlFifo_RxReset resets the receive channel of the FIFO specified by InstancePtr. More...
#define | XLlFifo_IsRxEmpty(InstancePtr)
| XLlFifo_IsRxEmpty returns true if the receive channel of the FIFO, specified by InstancePtr, is empty. More...
#define | XLlFifo_RxOccupancy(InstancePtr) XStrm_RxOccupancy(&((InstancePtr)->RxStreamer))
| XLlFifo_RxOccupancy returns the number of 32-bit words available (occupancy) to be read from the receive channel of the FIFO, specified by InstancePtr. More...
#define | XLlFifo_RxGetLen(InstancePtr) XStrm_RxGetLen(&((InstancePtr)->RxStreamer))
| XLlFifo_RxGetLen notifies the hardware that the program is ready to receive the next frame from the receive channel of the FIFO, specified by InstancePtr. More...
#define | XLlFifo_Read(InstancePtr, BufPtr, Bytes) XStrm_Read(&((InstancePtr)->RxStreamer), (BufPtr), (Bytes))
| XLlFifo_Read reads Bytes bytes from the receive channel of the FIFO referenced by InstancePtr to the block of memory, referenced by BufPtr. More...
#define | XLlFifo_TxReset(InstancePtr)
| XLlFifo_TxReset resets the transmit channel of the FIFO specified by InstancePtr. More...
#define | XLlFifo_IsTxDone(InstancePtr)
| XLlFifo_IsTxDone returns true if the transmission in the transmit channel of the FIFO, specified by InstancePtr, is complete. More...
#define | XLlFifo_IsRxDone(InstancePtr)
| XLlFifo_IsRxDone returns true if the reception in the receive channel of the FIFO, specified by InstancePtr, is complete. More...
#define | XLlFifo_TxVacancy(InstancePtr) XStrm_TxVacancy(&((InstancePtr)->TxStreamer))
| XLlFifo_TxVacancy returns the number of unused 32 bit words available (vacancy) in the send channel of the FIFO specified by InstancePtr. More...
#define | XLlFifo_TxSetLen(InstancePtr, Bytes) XStrm_TxSetLen(&((InstancePtr)->TxStreamer), (Bytes))
| XLlFifo_TxSetLen begins a hardware transfer of Bytes bytes out of the transmit channel of the FIFO specified by InstancePtr. More...
#define | XLlFifo_Write(InstancePtr, BufPtr, Bytes) XStrm_Write(&((InstancePtr)->TxStreamer), (BufPtr), (Bytes))
| XLlFifo_Write writes Bytes bytes of the block of memory, referenced by BufPtr, to the transmit channel of the FIFO referenced by InstancePtr. More...
#define | XLlFifo_WriteTdr(InstancePtr, Tdest)
| XLlFifo_WriteTdr writes to the Transmit Destination Register (TDR) More...
#define | XLlFifo_ReadRdr(InstancePtr) XLlFifo_ReadReg((InstancePtr)->BaseAddress, XLLF_RDR_OFFSET)
| XLlFifo_ReadTdr returns the contents of the Receive Destination Register(RDR). More...
#define | XLlFifo_ReadReg(BaseAddress, RegOffset) (Xil_In32((BaseAddress) + (RegOffset)))
| XLlFifo_ReadReg returns the value of the register at the offet, RegOffset, from the memory mapped base address, BaseAddress. More...
#define | XLlFifo_WriteReg(BaseAddress, RegOffset, Value) ((Xil_Out32((BaseAddress) + (RegOffset), (Value))))
| XLlFifo_WriteReg writes the value, Value, to the register at the offet, RegOffset, from the memory mapped base address, BaseAddress. More...

## Typedefs
typedef struct XLlFifo | XLlFifo
| This typedef defines a run-time instance of an XLlFifo device. More...
typedef struct XStrm_RxFifoStreamer | XStrm_RxFifoStreamer
| This typedef defines a run-time instance of a receive byte-streamer. More...
typedef struct XStrm_TxFifoStreamer | XStrm_TxFifoStreamer
| This typedef defines a run-time instance of a transmit byte-streamer. More...

## Functions
u32 | XLlFifo_iRxOccupancy (XLlFifo *InstancePtr)
| XLlFifo_iRxOccupancy returns the number of 32-bit words available (occupancy) to be read from the receive channel of the FIFO, specified by InstancePtr. More...
u32 | XLlFifo_iRxGetLen (XLlFifo *InstancePtr)
| XLlFifo_iRxGetLen notifies the hardware that the program is ready to receive the next frame from the receive channel of the FIFO specified by InstancePtr. More...
int | XLlFifo_iRead_Aligned (XLlFifo *InstancePtr, void *BufPtr, unsigned WordCount)
| XLlFifo_iRead_Aligned reads, WordCount, words from the FIFO referenced by InstancePtr to the block of memory, referenced by BufPtr. More...
u32 | XLlFifo_iTxVacancy (XLlFifo *InstancePtr)
| XLlFifo_iTxVacancy returns the number of unused 32 bit words available (vacancy) in the send channel of the FIFO, specified by InstancePtr. More...
void | XLlFifo_iTxSetLen (XLlFifo *InstancePtr, u32 Bytes)
| XLlFifo_iTxSetLen begins a hardware transfer of data out of the transmit channel of the FIFO, specified by InstancePtr. More...
int | XLlFifo_iWrite_Aligned (XLlFifo *InstancePtr, void *BufPtr, unsigned WordCount)
| XLlFifo_iWrite_Aligned writes, WordCount, words to the FIFO referenced by InstancePtr from the block of memory, referenced by BufPtr. More...
int | XLlFifo_CfgInitialize (XLlFifo *InstancePtr, XLlFifo_Config *Config, UINTPTR EffectiveAddress)
| XLlFifo_CfgInitialize initializes an XPS_ll_Fifo device along with the InstancePtr that references it. More...
u32 | XLlFifo_RxGetWord (XLlFifo *InstancePtr)
| XLlFifo_RxGetWord reads one 32 bit word from the FIFO specified by InstancePtr. More...
void | XLlFifo_TxPutWord (XLlFifo *InstancePtr, u32 Word)
| XLlFifo_TxPutWord writes the 32 bit word, Word to the FIFO specified by InstancePtr. More...
void | XLlFifo_Initialize (XLlFifo *InstancePtr, UINTPTR BaseAddress)
| XLlFifo_Initialize initializes an XPS_ll_Fifo device along with the InstancePtr that references it. More...
XLlFifo_Config * | XLlFfio_LookupConfig (u32 DeviceId)
| Look up the hardware configuration for a device instance. More...
void | XStrm_RxInitialize (XStrm_RxFifoStreamer *InstancePtr, unsigned FifoWidth, void *FifoInstance, XStrm_XferFnType ReadFn, XStrm_GetLenFnType GetLenFn, XStrm_GetOccupancyFnType GetOccupancyFn)
| XStrm_RxInitialize initializes the XStrm_RxFifoStreamer object referenced by InstancePtr. More...
void | XStrm_TxInitialize (XStrm_TxFifoStreamer *InstancePtr, unsigned FifoWidth, void *FifoInstance, XStrm_XferFnType WriteFn, XStrm_SetLenFnType SetLenFn, XStrm_GetVacancyFnType GetVacancyFn)
| XStrm_TxInitialize initializes the XStrm_TxFifoStreamer object referenced by InstancePtr. More...
u32 | XStrm_RxGetLen (XStrm_RxFifoStreamer *InstancePtr)
| XStrm_RxGetLen notifies the hardware that the program is ready to receive the next frame from the receive channel of the FIFO, specified by InstancePtr. More...
void | XStrm_Read (XStrm_RxFifoStreamer *InstancePtr, void *BufPtr, unsigned Bytes)
| XStrm_Read reads Bytes bytes from the FIFO specified by InstancePtr to the block of memory, referenced by BufPtr. More...
void | XStrm_TxSetLen (XStrm_TxFifoStreamer *InstancePtr, u32 Bytes)
| XStrm_TxSetLen flushes to the FIFO, specified by InstancePtr, any bytes remaining in internal buffers and begins a hardware transfer of data out of the transmit channel of the FIFO. More...
void | XStrm_Write (XStrm_TxFifoStreamer *InstancePtr, void *BufPtr, unsigned Bytes)
| XStrm_Write writes Bytes bytes of the block of memory, referenced by BufPtr, to the transmit channel of the FIFO referenced by InstancePtr. More...

## Registers
#define | XLLF_ISR_OFFSET 0x00000000
| Interrupt Status. More...
#define | XLLF_IER_OFFSET 0x00000004
| Interrupt Enable. More...
#define | XLLF_TDFR_OFFSET 0x00000008
| Transmit Reset. More...
#define | XLLF_TDFV_OFFSET 0x0000000c
| Transmit Vacancy. More...
#define | XLLF_TDFD_OFFSET 0x00000010
| Transmit Data. More...
#define | XLLF_AXI4_TDFD_OFFSET 0x00000000
| Axi4 Transmit Data. More...
#define | XLLF_TLF_OFFSET 0x00000014
| Transmit Length. More...
#define | XLLF_RDFR_OFFSET 0x00000018
| Receive Reset. More...
#define | XLLF_RDFO_OFFSET 0x0000001c
| Receive Occupancy. More...
#define | XLLF_RDFD_OFFSET 0x00000020
| Receive Data. More...
#define | XLLF_AXI4_RDFD_OFFSET 0x00001000
| Axi4 Receive Data. More...
#define | XLLF_RLF_OFFSET 0x00000024
| Receive Length. More...
#define | XLLF_LLR_OFFSET 0x00000028
| Local Link Reset. More...
#define | XLLF_TDR_OFFSET 0x0000002C
| Transmit Destination. More...
#define | XLLF_RDR_OFFSET 0x00000030
| Receive Destination. More...

## Interrupt bits
These bits are associated with the XLLF_IER_OFFSET and XLLF_ISR_OFFSET registers.
#define | XLLF_INT_RPURE_MASK 0x80000000
| Receive under-read. More...
#define | XLLF_INT_RPORE_MASK 0x40000000
| Receive over-read. More...
#define | XLLF_INT_RPUE_MASK 0x20000000
| Receive underrun (empty) More...
#define | XLLF_INT_TPOE_MASK 0x10000000
| Transmit overrun. More...
#define | XLLF_INT_TC_MASK 0x08000000
| Transmit complete. More...
#define | XLLF_INT_RC_MASK 0x04000000
| Receive complete. More...
#define | XLLF_INT_TSE_MASK 0x02000000
| Transmit length mismatch. More...
#define | XLLF_INT_TRC_MASK 0x01000000
| Transmit reset complete. More...
#define | XLLF_INT_RRC_MASK 0x00800000
| Receive reset complete. More...
#define | XLLF_INT_TFPF_MASK 0x00400000
| Tx FIFO Programmable Full, AXI FIFO MM2S Only. More...
#define | XLLF_INT_TFPE_MASK 0x00200000
| Tx FIFO Programmable Empty AXI FIFO MM2S Only. More...
#define | XLLF_INT_RFPF_MASK 0x00100000
| Rx FIFO Programmable Full AXI FIFO MM2S Only. More...
#define | XLLF_INT_RFPE_MASK 0x00080000
| Rx FIFO Programmable Empty AXI FIFO MM2S Only. More...
#define | XLLF_INT_ALL_MASK 0xfff80000
| All the ints. More...
#define | XLLF_INT_ERROR_MASK 0xf2000000
| Error status ints. More...
#define | XLLF_INT_RXERROR_MASK 0xe0000000
| Receive Error status ints. More...
#define | XLLF_INT_TXERROR_MASK 0x12000000
| Transmit Error status ints. More...

## Reset register values
These bits are associated with the XLLF_TDFR_OFFSET and XLLF_RDFR_OFFSET reset registers.
#define | XLLF_RDFR_RESET_MASK 0x000000a5
| receive reset value More...
#define | XLLF_TDFR_RESET_MASK 0x000000a5
| Transmit reset value. More...
#define | XLLF_LLR_RESET_MASK 0x000000a5
| Local Link reset value. More...

## Macro Definition Documentation

#define XLLF_AXI4_RDFD_OFFSET 0x00001000

Axi4 Receive Data.

Referenced by XLlFifo_RxGetWord().

#define XLLF_AXI4_TDFD_OFFSET 0x00000000

Axi4 Transmit Data.

Referenced by XLlFifo_TxPutWord().

#define XLLF_IER_OFFSET 0x00000004

Interrupt Enable.

#define XLLF_INT_ALL_MASK 0xfff80000

All the ints.

Referenced by XLlFifoInterruptExample().

#define XLLF_INT_ERROR_MASK 0xf2000000

Error status ints.

#define XLLF_INT_RC_MASK 0x04000000

Receive complete.

#define XLLF_INT_RFPE_MASK 0x00080000

Rx FIFO Programmable Empty AXI FIFO MM2S Only.

#define XLLF_INT_RFPF_MASK 0x00100000

Rx FIFO Programmable Full AXI FIFO MM2S Only.

#define XLLF_INT_RPORE_MASK 0x40000000

Receive over-read.

#define XLLF_INT_RPUE_MASK 0x20000000

Receive underrun (empty)

#define XLLF_INT_RPURE_MASK 0x80000000

Receive under-read.

#define XLLF_INT_RRC_MASK 0x00800000

Receive reset complete.

#define XLLF_INT_RXERROR_MASK 0xe0000000

Receive Error status ints.

#define XLLF_INT_TC_MASK 0x08000000

Transmit complete.

#define XLLF_INT_TFPE_MASK 0x00200000

Tx FIFO Programmable Empty AXI FIFO MM2S Only.

#define XLLF_INT_TFPF_MASK 0x00400000

Tx FIFO Programmable Full, AXI FIFO MM2S Only.

#define XLLF_INT_TPOE_MASK 0x10000000

Transmit overrun.

#define XLLF_INT_TRC_MASK 0x01000000

Transmit reset complete.

#define XLLF_INT_TSE_MASK 0x02000000

Transmit length mismatch.

#define XLLF_INT_TXERROR_MASK 0x12000000

Transmit Error status ints.

#define XLLF_ISR_OFFSET 0x00000000

Interrupt Status.

#define XLLF_LLR_OFFSET 0x00000028

Local Link Reset.

Referenced by XLlFifo_CfgInitialize(), and XLlFifo_Initialize().

#define XLLF_LLR_RESET_MASK 0x000000a5

Local Link reset value.

#define XLLF_RDFD_OFFSET 0x00000020

Receive Data.

Referenced by XLlFifo_RxGetWord().

#define XLLF_RDFO_OFFSET 0x0000001c

Receive Occupancy.

Referenced by XLlFifo_iRxOccupancy().

#define XLLF_RDFR_OFFSET 0x00000018

Receive Reset.

#define XLLF_RDFR_RESET_MASK 0x000000a5

receive reset value

Referenced by XLlFifo_CfgInitialize(), and XLlFifo_Initialize().

#define XLLF_RDR_OFFSET 0x00000030

Receive Destination.

#define XLLF_RLF_OFFSET 0x00000024

Receive Length.

Referenced by XLlFifo_iRxGetLen().

#define XLLF_TDFD_OFFSET 0x00000010

Transmit Data.

Referenced by XLlFifo_TxPutWord().

#define XLLF_TDFR_OFFSET 0x00000008

Transmit Reset.

#define XLLF_TDFR_RESET_MASK 0x000000a5

Transmit reset value.

#define XLLF_TDFV_OFFSET 0x0000000c

Transmit Vacancy.

Referenced by XLlFifo_iTxVacancy().

#define XLLF_TDR_OFFSET 0x0000002C

Transmit Destination.

#define XLLF_TLF_OFFSET 0x00000014

Transmit Length.

Referenced by XLlFifo_iTxSetLen().

#define XLlFifo_IntClear | ( |  | InstancePtr,
|  |  | Mask
| ) |  |

Value:
XLlFifo_WriteReg((InstancePtr)->BaseAddress, XLLF_ISR_OFFSET, \
((Mask) & XLLF_INT_ALL_MASK))
XLLF_INT_ALL_MASK
#define XLLF_INT_ALL_MASK
All the ints.
Definition: xllfifo_hw.h:109
XLlFifo_WriteReg
#define XLlFifo_WriteReg(BaseAddress, RegOffset, Value)
XLlFifo_WriteReg writes the value, Value, to the register at the offet, RegOffset, from the memory mapped base address, BaseAddress.
Definition: xllfifo_hw.h:213
XLLF_ISR_OFFSET
#define XLLF_ISR_OFFSET
Interrupt Status.
Definition: xllfifo_hw.h:57

XLlFifo_IntClear clears pending interrupts specified in Mask for the FIFO specified by InstancePtr.

The corresponding pending interrupt for each bit set to 1 in Mask, will be cleared. In other words, XLlFifo_IntClear uses the "set a bit to clear it" scheme.

Parameters

  InstancePtr | references the FIFO on which to operate.
  Mask | contains a bit mask of the pending interrupts to clear. The mask can be formed using a set of bitwise or'd values from the `XLLF_INT_*_MASK` preprocessor symbols.

Note
  C-style signature: void XLlFifo_IntClear(XLlFifo *InstancePtr, u32 Mask)

Referenced by XLlFifoInterruptExample().

#define XLlFifo_IntDisable | ( |  | InstancePtr,
|  |  | Mask
| ) |  |

Value:
{ \
u32 Reg = XLlFifo_ReadReg((InstancePtr)->BaseAddress, \
XLLF_IER_OFFSET); \
Reg &= ~((Mask) & XLLF_INT_ALL_MASK); \
XLlFifo_WriteReg((InstancePtr)->BaseAddress, XLLF_IER_OFFSET, \
Reg); \
}
XLLF_INT_ALL_MASK
#define XLLF_INT_ALL_MASK
All the ints.
Definition: xllfifo_hw.h:109
XLlFifo_WriteReg
#define XLlFifo_WriteReg(BaseAddress, RegOffset, Value)
XLlFifo_WriteReg writes the value, Value, to the register at the offet, RegOffset, from the memory mapped base address, BaseAddress.
Definition: xllfifo_hw.h:213
XLlFifo_ReadReg
#define XLlFifo_ReadReg(BaseAddress, RegOffset)
XLlFifo_ReadReg returns the value of the register at the offet, RegOffset, from the memory mapped bas...
Definition: xllfifo_hw.h:181
XLLF_IER_OFFSET
#define XLLF_IER_OFFSET
Interrupt Enable.
Definition: xllfifo_hw.h:58

XLlFifo_IntDisable disables the interrupts specified in Mask for the FIFO specified by InstancePtr.

The corresponding interrupt for each bit set to 1 in Mask, will be disabled. In other words, XLlFifo_IntDisable uses the "set a bit to clear it" scheme.

Parameters

  InstancePtr | references the FIFO on which to operate.
  Mask | contains a bit mask of the interrupts to disable. The mask can be formed using a set of bitwise or'd values from the `XLLF_INT_*_MASK` preprocessor symbols.

Returns
  N/A

Note
  C-style signature: void XLlFifo_IntDisable(XLlFifo *InstancePtr, u32 Mask)

#define XLlFifo_IntEnable | ( |  | InstancePtr,
|  |  | Mask
| ) |  |

Value:
{ \
u32 Reg = XLlFifo_ReadReg((InstancePtr)->BaseAddress, \
XLLF_IER_OFFSET); \
Reg |= ((Mask) & XLLF_INT_ALL_MASK); \
XLlFifo_WriteReg((InstancePtr)->BaseAddress, XLLF_IER_OFFSET, \
Reg); \
}
XLLF_INT_ALL_MASK
#define XLLF_INT_ALL_MASK
All the ints.
Definition: xllfifo_hw.h:109
XLlFifo_WriteReg
#define XLlFifo_WriteReg(BaseAddress, RegOffset, Value)
XLlFifo_WriteReg writes the value, Value, to the register at the offet, RegOffset, from the memory mapped base address, BaseAddress.
Definition: xllfifo_hw.h:213
XLlFifo_ReadReg
#define XLlFifo_ReadReg(BaseAddress, RegOffset)
XLlFifo_ReadReg returns the value of the register at the offet, RegOffset, from the memory mapped bas...
Definition: xllfifo_hw.h:181
XLLF_IER_OFFSET
#define XLLF_IER_OFFSET
Interrupt Enable.
Definition: xllfifo_hw.h:58

XLlFifo_IntEnable enables the interrupts specified in Mask for the FIFO specified by InstancePtr.

The corresponding interrupt for each bit set to 1 in Mask, will be enabled.

Parameters

  InstancePtr | references the FIFO on which to operate.
  Mask | contains a bit mask of the interrupts to enable. The mask can be formed using a set of bitwise or'd values from the `XLLF_INT_*_MASK` preprocessor symbols.

Returns
  N/A

Note
  C-style signature: void XLlFifo_IntEnable(XLlFifo *InstancePtr, u32 Mask)

Referenced by XLlFifoInterruptExample().

#define XLlFifo_IntPending | ( |  | InstancePtr | ) |

Value:
(XLlFifo_ReadReg((InstancePtr)->BaseAddress, XLLF_IER_OFFSET) & \
XLlFifo_ReadReg((InstancePtr)->BaseAddress, XLLF_ISR_OFFSET))
XLLF_ISR_OFFSET
#define XLLF_ISR_OFFSET
Interrupt Status.
Definition: xllfifo_hw.h:57
XLlFifo_ReadReg
#define XLlFifo_ReadReg(BaseAddress, RegOffset)
XLlFifo_ReadReg returns the value of the register at the offet, RegOffset, from the memory mapped bas...
Definition: xllfifo_hw.h:181
XLLF_IER_OFFSET
#define XLLF_IER_OFFSET
Interrupt Enable.
Definition: xllfifo_hw.h:58

XLlFifo_IntPending returns a bit mask of the pending interrupts for the FIFO specified by InstancePtr.

Each bit set to 1 in the return value represents a pending interrupt.

Parameters

  InstancePtr | references the FIFO on which to operate.

Returns
  XLlFifo_IntPending returns a bit mask of the interrupts that are pending. The mask will be a set of bitwise or'd values from the `XLLF_INT_*_MASK` preprocessor symbols.

Note
  C-style signature: u32 XLlFifo_IntPending(XLlFifo *InstancePtr)

#define XLlFifo_IsRxDone | ( |  | InstancePtr | ) |

Value:
((XLlFifo_ReadReg((InstancePtr)->BaseAddress, XLLF_ISR_OFFSET) & \
XLLF_INT_RC_MASK) \
? TRUE : FALSE)
XLLF_ISR_OFFSET
#define XLLF_ISR_OFFSET
Interrupt Status.
Definition: xllfifo_hw.h:57
XLlFifo_ReadReg
#define XLlFifo_ReadReg(BaseAddress, RegOffset)
XLlFifo_ReadReg returns the value of the register at the offet, RegOffset, from the memory mapped bas...
Definition: xllfifo_hw.h:181
XLLF_INT_RC_MASK
#define XLLF_INT_RC_MASK
Receive complete.
Definition: xllfifo_hw.h:93

XLlFifo_IsRxDone returns true if the reception in the receive channel of the FIFO, specified by InstancePtr, is complete.

XLlFifo_IsRxDone works only if the RC bit in the ISR register is cleared before receiving a frame.

Parameters

  InstancePtr | references the FIFO on which to operate.

Returns
  XLlFifo_IsRxDone returns TRUE when the receive channel of the FIFO is complete. Otherwise, XLlFifo_IsRxDone returns FALSE.

Note
  C-style signature: int XLlFifo_IsRxDone(XLlFifo *InstancePtr)

#define XLlFifo_IsRxEmpty | ( |  | InstancePtr | ) |

Value:
((XLlFifo_ReadReg((InstancePtr)->BaseAddress, XLLF_RDFO_OFFSET) == 0) \
? TRUE : FALSE)
XLlFifo_ReadReg
#define XLlFifo_ReadReg(BaseAddress, RegOffset)
XLlFifo_ReadReg returns the value of the register at the offet, RegOffset, from the memory mapped bas...
Definition: xllfifo_hw.h:181
XLLF_RDFO_OFFSET
#define XLLF_RDFO_OFFSET
Receive Occupancy.
Definition: xllfifo_hw.h:67

XLlFifo_IsRxEmpty returns true if the receive channel of the FIFO, specified by InstancePtr, is empty.

Parameters

  InstancePtr | references the FIFO on which to operate.

Returns
  XLlFifo_IsRxEmpty returns TRUE when the receive channel of the FIFO is empty. Otherwise, XLlFifo_IsRxEmpty returns FALSE.

Note
  C-style signature: int XLlFifo_IsRxEmpty(XLlFifo *InstancePtr)

#define XLlFifo_IsTxDone | ( |  | InstancePtr | ) |

Value:
((XLlFifo_ReadReg((InstancePtr)->BaseAddress, XLLF_ISR_OFFSET) & \
XLLF_INT_TC_MASK) \
? TRUE : FALSE)
XLLF_ISR_OFFSET
#define XLLF_ISR_OFFSET
Interrupt Status.
Definition: xllfifo_hw.h:57
XLlFifo_ReadReg
#define XLlFifo_ReadReg(BaseAddress, RegOffset)
XLlFifo_ReadReg returns the value of the register at the offet, RegOffset, from the memory mapped bas...
Definition: xllfifo_hw.h:181
XLLF_INT_TC_MASK
#define XLLF_INT_TC_MASK
Transmit complete.
Definition: xllfifo_hw.h:92

XLlFifo_IsTxDone returns true if the transmission in the transmit channel of the FIFO, specified by InstancePtr, is complete.

XLlFifo_IsTxDone works only if the TC bit in the IS register is cleared before sending a frame.

Parameters

  InstancePtr | references the FIFO on which to operate.

Returns
  XLlFifo_IsTxDone returns TRUE when the transmit channel of the FIFO is complete. Otherwise, XLlFifo_IsTxDone returns FALSE.

Note
  C-style signature: int XLlFifo_IsTxDone(XLlFifo *InstancePtr)

#define XLlFifo_Read | ( |  | InstancePtr,
|  |  | BufPtr,
|  |  | Bytes
| ) |  | XStrm_Read(&((InstancePtr)->RxStreamer), (BufPtr), (Bytes))

XLlFifo_Read reads Bytes bytes from the receive channel of the FIFO referenced by InstancePtr to the block of memory, referenced by BufPtr.

Care must be taken to ensure that the number of bytes read with one or more calls to XLlFifo_Read() does not exceed the number of bytes available given from the last call to XLlFifo_RxGetLen().

Parameters

  InstancePtr | references the FIFO on which to operate.
  BufPtr | specifies the memory address to place the data read.
  Bytes | specifies the number of bytes to read.

Returns
  N/A

Note
  Error handling is handled through hardware exceptions and interrupts.

C Signature: void XLlFifo_Read(XLlFifo *InstancePtr, void *BufPtr, unsigned Bytes)

#define XLlFifo_ReadRdr | ( |  | InstancePtr | ) | XLlFifo_ReadReg((InstancePtr)->BaseAddress, XLLF_RDR_OFFSET)

XLlFifo_ReadTdr returns the contents of the Receive Destination Register(RDR).

The RDR contains destination address corresponding to the valid packet that is received. The RDR should only be read when a receive packet is available for processing (the receive occupancy is not zero). Once the RDR is read, the receive packet data should be read from the receive data FIFO before the RDR is read again. The RDR values are stored in the receive data FIFO by the AXI4-Stream FIFO core with the data of each packet. The RDR value for the subsequent packet to be processed is moved to the RDR when the previous RDR value has been read.

Parameters

  InstancePtr | references the FIFO on which to operate.

Returns
  The Receive Destination address read from the RDR.

Note
  C Signature: u32 XLlFifo_ReadRdr(XLlFifo *InstancePtr)

#define XLlFifo_ReadReg | ( |  | BaseAddress,
|  |  | RegOffset
| ) |  | (Xil_In32((BaseAddress) + (RegOffset)))

XLlFifo_ReadReg returns the value of the register at the offet, RegOffset, from the memory mapped base address, BaseAddress.

Parameters

  BaseAddress | specifies the base address of the device.
  RegOffset | specifies the offset from BaseAddress.

Returns
  XLlFifo_ReadReg returns the value of the specified register.

Note
  C-style signature: u32 XLlFifo_ReadReg(u32 BaseAddress, u32 RegOffset)

Referenced by XLlFifo_iRxGetLen(), XLlFifo_iRxOccupancy(), XLlFifo_iTxVacancy(), and XLlFifo_RxGetWord().

#define XLlFifo_Reset | ( |  | InstancePtr | ) |

Value:
XLlFifo_WriteReg((InstancePtr)->BaseAddress, XLLF_LLR_OFFSET, \
XLLF_LLR_RESET_MASK)
XLLF_LLR_OFFSET
#define XLLF_LLR_OFFSET
Local Link Reset.
Definition: xllfifo_hw.h:71
XLlFifo_WriteReg
#define XLlFifo_WriteReg(BaseAddress, RegOffset, Value)
XLlFifo_WriteReg writes the value, Value, to the register at the offet, RegOffset, from the memory mapped base address, BaseAddress.
Definition: xllfifo_hw.h:213
XLLF_LLR_RESET_MASK
#define XLLF_LLR_RESET_MASK
Local Link reset value.
Definition: xllfifo_hw.h:122

XLlFifo_Reset resets both the Tx and Rx channels and the local link interface the FIFO specified by InstancePtr.

XLlFifo_TxReset resets also sends a reset pulse to the downstream device (e.g. TEMAC). XLlFifo_Reset drops any bytes in the FIFO not yet retrieved. XLlFifo_Reset drops any bytes in the FIFO not yet transmitted.

Parameters

  InstancePtr | references the FIFO on which to operate.

Returns
  N/A

Note
  C-style signature: void XLlFifo_Reset(XLlFifo *InstancePtr)

#define XLlFifo_RxGetLen | ( |  | InstancePtr | ) | XStrm_RxGetLen(&((InstancePtr)->RxStreamer))

XLlFifo_RxGetLen notifies the hardware that the program is ready to receive the next frame from the receive channel of the FIFO, specified by InstancePtr.

Note that the program must first call XLlFifo_RxGetLen before pulling data out of the receive channel of the FIFO with XLlFifo_Read.

Parameters

  InstancePtr | references the FIFO on which to operate.

Returns
  XLlFifo_RxGetLen returns the number of bytes available in the next frame.

Note

C Signature: u32 XLlFifo_RxGetLen(XLlFifo *InstancePtr)

#define XLlFifo_RxOccupancy | ( |  | InstancePtr | ) | XStrm_RxOccupancy(&((InstancePtr)->RxStreamer))

XLlFifo_RxOccupancy returns the number of 32-bit words available (occupancy) to be read from the receive channel of the FIFO, specified by InstancePtr.

The xps_ll_fifo core uses the same fifo to store data values and frame length values. Upon initialization, the XLlFifo_RxOccupancy will give the value of 1, which means one length value (a reserved fifo location) and no data values.

Parameters

  InstancePtr | references the FIFO on which to operate.

Returns
  XLlFifo_RxOccupancy returns the occupancy count for the specified packet FIFO.

Note

C Signature: u32 XLlFifo_RxOccupancy(XLlFifo *InstancePtr)

#define XLlFifo_RxReset | ( |  | InstancePtr | ) |

Value:
XLlFifo_WriteReg((InstancePtr)->BaseAddress, XLLF_RDFR_OFFSET, \
XLLF_RDFR_RESET_MASK)
XLLF_RDFR_RESET_MASK
#define XLLF_RDFR_RESET_MASK
receive reset value
Definition: xllfifo_hw.h:120
XLlFifo_WriteReg
#define XLlFifo_WriteReg(BaseAddress, RegOffset, Value)
XLlFifo_WriteReg writes the value, Value, to the register at the offet, RegOffset, from the memory mapped base address, BaseAddress.
Definition: xllfifo_hw.h:213
XLLF_RDFR_OFFSET
#define XLLF_RDFR_OFFSET
Receive Reset.
Definition: xllfifo_hw.h:66

XLlFifo_RxReset resets the receive channel of the FIFO specified by InstancePtr.

XLlFifo_RxReset drops any bytes in the FIFO not yet retrieved.

The calling software may want to test for the completion of the reset by reading the interrupt status (IS) register and testing for the Rx Reset complete (RRC) bit.

Parameters

  InstancePtr | references the FIFO on which to operate.

Returns
  N/A

Note
  C-style signature: void XLlFifo_RxReset(XLlFifo *InstancePtr)

Referenced by XLlFifo_CfgInitialize(), and XLlFifo_Initialize().

#define XLlFifo_Status | ( |  | InstancePtr | ) | XLlFifo_ReadReg((InstancePtr)->BaseAddress, XLLF_ISR_OFFSET)

XLlFifo_Status returns a bit mask of the interrupt status register (ISR) for the FIFO specified by InstancePtr.

XLlFifo_Status can be used to query the status of the FIFO without having to have interrupts enabled.

Parameters

  InstancePtr | references the FIFO on which to operate.

Returns
  XLlFifo_IntStatus returns a bit mask of the status conditions. The mask will be a set of bitwise or'd values from the `XLLF_INT_*_MASK` preprocessor symbols.

Note
  C-style signature: u32 XLlFifo_IntStatus(XLlFifo *InstancePtr)

Referenced by XLlFifoInterruptExample().

#define XLlFifo_TxReset | ( |  | InstancePtr | ) |

Value:
XLlFifo_WriteReg((InstancePtr)->BaseAddress, XLLF_TDFR_OFFSET, \
XLLF_TDFR_RESET_MASK)
XLlFifo_WriteReg
#define XLlFifo_WriteReg(BaseAddress, RegOffset, Value)
XLlFifo_WriteReg writes the value, Value, to the register at the offet, RegOffset, from the memory mapped base address, BaseAddress.
Definition: xllfifo_hw.h:213
XLLF_TDFR_OFFSET
#define XLLF_TDFR_OFFSET
Transmit Reset.
Definition: xllfifo_hw.h:60
XLLF_TDFR_RESET_MASK
#define XLLF_TDFR_RESET_MASK
Transmit reset value.
Definition: xllfifo_hw.h:121

XLlFifo_TxReset resets the transmit channel of the FIFO specified by InstancePtr.

XLlFifo_TxReset drops any bytes in the FIFO not yet transmitted.

The calling software may want to test for the completion of the reset by reading the interrupt status (IS) register and testing for the Tx Reset complete (TRC) bit.

Parameters

  InstancePtr | references the FIFO on which to operate.

Returns
  N/A

Note
  C-style signature: void XLlFifo_TxReset(XLlFifo *InstancePtr)

Referenced by XLlFifo_CfgInitialize(), and XLlFifo_Initialize().

#define XLlFifo_TxSetLen | ( |  | InstancePtr,
|  |  | Bytes
| ) |  | XStrm_TxSetLen(&((InstancePtr)->TxStreamer), (Bytes))

XLlFifo_TxSetLen begins a hardware transfer of Bytes bytes out of the transmit channel of the FIFO specified by InstancePtr.

Parameters

  InstancePtr | references the FIFO on which to operate.
  Bytes | specifies the frame length in bytes.

Returns
  N/A

Note

C Signature: void XLlFifo_TxSetLen(XLlFifo *InstancePtr, u32 Bytes)

#define XLlFifo_TxVacancy | ( |  | InstancePtr | ) | XStrm_TxVacancy(&((InstancePtr)->TxStreamer))

XLlFifo_TxVacancy returns the number of unused 32 bit words available (vacancy) in the send channel of the FIFO specified by InstancePtr.

The xps_ll_fifo core uses tXLLF_he same fifo to store data values and frame length values. Upon initialization, the XLlFifo_TxVacancy will give the value of FIFO_WIDTH - 1, which means one length value used (a reserved fifo location) and no data values yet present.

Parameters

  InstancePtr | references the FIFO on which to operate.

Returns
  XLlFifo_TxVacancy returns the vacancy count in 32-bit words for the specified FIFO.

Note
  C-style signature: u32 XLlFifo_TxVacancy(XLlFifo *InstancePtr)

#define XLlFifo_Write | ( |  | InstancePtr,
|  |  | BufPtr,
|  |  | Bytes
| ) |  | XStrm_Write(&((InstancePtr)->TxStreamer), (BufPtr), (Bytes))

XLlFifo_Write writes Bytes bytes of the block of memory, referenced by BufPtr, to the transmit channel of the FIFO referenced by InstancePtr.

Care must be taken to ensure that the number of bytes written with one or more calls to XLlFifo_Write() matches the number of bytes given in the next call to XLlFifo_TxSetLen().

Parameters

  InstancePtr | references the FIFO on which to operate.
  BufPtr | specifies the memory address of data to write.
  Bytes | specifies the number of bytes to write.

Returns
  N/A

Note
  Error handling is handled through hardware exceptions and interrupts.

C Signature: void XLlFifo_Write(XLlFifo *InstancePtr, void *BufPtr, unsigned Bytes)

#define XLlFifo_WriteReg | ( |  | BaseAddress,
|  |  | RegOffset,
|  |  | Value
| ) |  | ((Xil_Out32((BaseAddress) + (RegOffset), (Value))))

XLlFifo_WriteReg writes the value, Value, to the register at the offet, RegOffset, from the memory mapped base address, BaseAddress.

Parameters

  BaseAddress | specifies the base address of the device.
  RegOffset | specifies the offset from BaseAddress.
  Value | is value to write to the register.

Returns
  N/A

Note
  C-style signature: void XLlFifo_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Value)

Referenced by XLlFifo_CfgInitialize(), XLlFifo_Initialize(), XLlFifo_iTxSetLen(), and XLlFifo_TxPutWord().

#define XLlFifo_WriteTdr | ( |  | InstancePtr,
|  |  | Tdest
| ) |  |

Value:
XLlFifo_WriteReg((InstancePtr)->BaseAddress, XLLF_TDR_OFFSET, \
Tdest & 0xF)
XLlFifo_WriteReg
#define XLlFifo_WriteReg(BaseAddress, RegOffset, Value)
XLlFifo_WriteReg writes the value, Value, to the register at the offet, RegOffset, from the memory mapped base address, BaseAddress.
Definition: xllfifo_hw.h:213
XLLF_TDR_OFFSET
#define XLLF_TDR_OFFSET
Transmit Destination.
Definition: xllfifo_hw.h:72

XLlFifo_WriteTdr writes to the Transmit Destination Register (TDR)

The TDR stores the destination address corresponding to the packet to be transmitted. When presenting a transmit packet to the AXI4-Stream FIFO core the following sequence should be followed

- Write the destination address into TDR first,
- Write the packet data to the Transmit Data FIFO next
- Write the length of the packet into the Transmit Length Register.

Parameters

  InstancePtr | references the FIFO on which to operate.
  Tdest | is the Transmit Destination address to be written to TDR.

Returns
  N/A

Note
  C Signature: void XLlFifo_WriteTdr(XLlFifo *InstancePtr, u32 Tdest);

## Typedef Documentation

typedef struct XLlFifo XLlFifo

This typedef defines a run-time instance of an XLlFifo device.

typedef struct XStrm_RxFifoStreamer XStrm_RxFifoStreamer

This typedef defines a run-time instance of a receive byte-streamer.

typedef struct XStrm_TxFifoStreamer XStrm_TxFifoStreamer

This typedef defines a run-time instance of a transmit byte-streamer.

## Function Documentation

XLlFifo_Config * XLlFfio_LookupConfig | ( | u32 | DeviceId | ) |

Look up the hardware configuration for a device instance.

Parameters

  DeviceId | is the unique device ID of the device to lookup for

Returns
  The configuration structure for the device. If the device ID is not found,a NULL pointer is returned.

Note
  None

Referenced by XLlFifoInterruptExample().

int XLlFifo_CfgInitialize | ( | XLlFifo * | InstancePtr,
|  | XLlFifo_Config * | Config,
|  | UINTPTR | EffectiveAddress
| ) |  |

XLlFifo_CfgInitialize initializes an XPS_ll_Fifo device along with the InstancePtr that references it.

Parameters

  InstancePtr | is a pointer to the Axi Streaming FIFO instance to be worked on.
  Config | references the structure holding the hardware configuration for the Axi Streaming FIFO core to initialize.
  EffectiveAddress | is the device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, use Config->BaseAddress for this parameters, passing the physical address instead.

Returns
  N/A

References XLlFifo::Axi4BaseAddress, XLlFifo::BaseAddress, XLlFifo::Datainterface, XLlFifo::IsReady, XLlFifo::RxStreamer, XLlFifo::TxStreamer, XLLF_LLR_OFFSET, XLLF_RDFR_RESET_MASK, XLlFifo_iRead_Aligned(), XLlFifo_iRxGetLen(), XLlFifo_iRxOccupancy(), XLlFifo_iTxSetLen(), XLlFifo_iTxVacancy(), XLlFifo_iWrite_Aligned(), XLlFifo_RxReset, XLlFifo_TxReset, XLlFifo_WriteReg, XStrm_RxInitialize(), and XStrm_TxInitialize().

Referenced by XLlFifoInterruptExample().

void XLlFifo_Initialize | ( | XLlFifo * | InstancePtr,
|  | UINTPTR | BaseAddress
| ) |  |

XLlFifo_Initialize initializes an XPS_ll_Fifo device along with the InstancePtr that references it.

Parameters

  InstancePtr | references the memory instance to be associated with the FIFO device upon initialization.
  BaseAddress | is the processor address used to access the base address of the Fifo device.

Returns
  N/A

References XLlFifo::Axi4BaseAddress, XLlFifo::BaseAddress, XLlFifo::IsReady, XLlFifo::RxStreamer, XLlFifo::TxStreamer, XLLF_LLR_OFFSET, XLLF_RDFR_RESET_MASK, XLlFifo_iRead_Aligned(), XLlFifo_iRxGetLen(), XLlFifo_iRxOccupancy(), XLlFifo_iTxSetLen(), XLlFifo_iTxVacancy(), XLlFifo_iWrite_Aligned(), XLlFifo_RxReset, XLlFifo_TxReset, XLlFifo_WriteReg, XStrm_RxInitialize(), and XStrm_TxInitialize().

int XLlFifo_iRead_Aligned | ( | XLlFifo * | InstancePtr,
|  | void * | BufPtr,
|  | unsigned | WordCount
| ) |  |

XLlFifo_iRead_Aligned reads, WordCount, words from the FIFO referenced by InstancePtr to the block of memory, referenced by BufPtr.

XLlFifo_iRead_Aligned assumes that BufPtr is already aligned according to the following hardware limitations: ppc - aligned on 32 bit boundaries to avoid performance penalties from unaligned exception handling. microblaze - aligned on 32 bit boundaries as microblaze does not handle unaligned transfers.

Care must be taken to ensure that the number of words read with one or more calls to XLlFifo_Read() does not exceed the number of bytes (rounded up to the nearest whole 32 bit word) available given from the last call to XLlFifo_RxGetLen().

Parameters

  InstancePtr | references the FIFO on which to operate.
  BufPtr | specifies the memory address to place the data read.
  WordCount | specifies the number of 32 bit words to read.

Returns
  XLlFifo_iRead_Aligned always returns XST_SUCCESS. Error handling is otherwise handled through hardware exceptions and interrupts.

References XLlFifo_RxGetWord().

Referenced by XLlFifo_CfgInitialize(), and XLlFifo_Initialize().

u32 XLlFifo_iRxGetLen | ( | XLlFifo * | InstancePtr | ) |

XLlFifo_iRxGetLen notifies the hardware that the program is ready to receive the next frame from the receive channel of the FIFO specified by InstancePtr.

Note that the program must first call XLlFifo_iRxGetLen before pulling data out of the receive channel of the FIFO with XLlFifo_Read.

Parameters

  InstancePtr | references the FIFO on which to operate.

Returns
  XLlFifo_iRxGetLen returns the number of bytes available in the next frame.

References XLlFifo::BaseAddress, XLLF_RLF_OFFSET, and XLlFifo_ReadReg.

Referenced by XLlFifo_CfgInitialize(), and XLlFifo_Initialize().

u32 XLlFifo_iRxOccupancy | ( | XLlFifo * | InstancePtr | ) |

XLlFifo_iRxOccupancy returns the number of 32-bit words available (occupancy) to be read from the receive channel of the FIFO, specified by InstancePtr.

Parameters

  InstancePtr | references the FIFO on which to operate.

Returns
  XLlFifo_iRxOccupancy returns the occupancy count in 32-bit words for the specified FIFO.

References XLlFifo::BaseAddress, XLLF_RDFO_OFFSET, and XLlFifo_ReadReg.

Referenced by XLlFifo_CfgInitialize(), and XLlFifo_Initialize().

void XLlFifo_iTxSetLen | ( | XLlFifo * | InstancePtr,
|  | u32 | Bytes
| ) |  |

XLlFifo_iTxSetLen begins a hardware transfer of data out of the transmit channel of the FIFO, specified by InstancePtr.

Bytes specifies the number of bytes in the frame to transmit.

Note that Bytes (rounded up to the nearest whole 32 bit word) must be same number of words just written using one or more calls to XLlFifo_iWrite_Aligned()

Parameters

  InstancePtr | references the FIFO on which to operate.
  Bytes | specifies the number of bytes to transmit.

Returns
  N/A

References XLlFifo::BaseAddress, XLLF_TLF_OFFSET, and XLlFifo_WriteReg.

Referenced by TxSend(), XLlFifo_CfgInitialize(), and XLlFifo_Initialize().

u32 XLlFifo_iTxVacancy | ( | XLlFifo * | InstancePtr | ) |

XLlFifo_iTxVacancy returns the number of unused 32 bit words available (vacancy) in the send channel of the FIFO, specified by InstancePtr.

Parameters

  InstancePtr | references the FIFO on which to operate.

Returns
  XLlFifo_iTxVacancy returns the vacancy count in 32-bit words for the specified FIFO.

References XLlFifo::BaseAddress, XLLF_TDFV_OFFSET, and XLlFifo_ReadReg.

Referenced by TxSend(), XLlFifo_CfgInitialize(), and XLlFifo_Initialize().

int XLlFifo_iWrite_Aligned | ( | XLlFifo * | InstancePtr,
|  | void * | BufPtr,
|  | unsigned | WordCount
| ) |  |

XLlFifo_iWrite_Aligned writes, WordCount, words to the FIFO referenced by InstancePtr from the block of memory, referenced by BufPtr.

XLlFifo_iWrite_Aligned assumes that BufPtr is already aligned according to the following hardware limitations: ppc - aligned on 32 bit boundaries to avoid performance penalties from unaligned exception handling. microblaze - aligned on 32 bit boundaries as microblaze does not handle unaligned transfers.

Care must be taken to ensure that the number of words written with one or more calls to XLlFifo_iWrite_Aligned() matches the number of bytes (rounded up to the nearest whole 32 bit word) given in the next call to XLlFifo_iTxSetLen().

Parameters

  InstancePtr | references the FIFO on which to operate.
  BufPtr | specifies the memory address to place the data read.
  WordCount | specifies the number of 32 bit words to read.

Returns
  XLlFifo_iWrite_Aligned always returns XST_SUCCESS. Error handling is otherwise handled through hardware exceptions and interrupts.

Note

C Signature: int XLlFifo_iWrite_Aligned(XLlFifo *InstancePtr, void *BufPtr, unsigned WordCount);

References XLlFifo_TxPutWord().

Referenced by XLlFifo_CfgInitialize(), and XLlFifo_Initialize().

u32 XLlFifo_RxGetWord | ( | XLlFifo * | InstancePtr | ) |

XLlFifo_RxGetWord reads one 32 bit word from the FIFO specified by InstancePtr.

XLlFifo_RxGetLen or XLlFifo_iRxGetLen must be called before calling XLlFifo_RxGetWord. Otherwise, the hardware will raise an Over Read Exception.

Parameters

  InstancePtr | references the FIFO on which to operate.

Returns
  XLlFifo_RxGetWord returns the 32 bit word read from the FIFO.

Note
  C-style signature: u32 XLlFifo_RxGetWord(XLlFifo *InstancePtr)

References XLlFifo::Datainterface, XLLF_AXI4_RDFD_OFFSET, XLLF_RDFD_OFFSET, and XLlFifo_ReadReg.

Referenced by XLlFifo_iRead_Aligned().

void XLlFifo_TxPutWord | ( | XLlFifo * | InstancePtr,
|  | u32 | Word
| ) |  |

XLlFifo_TxPutWord writes the 32 bit word, Word to the FIFO specified by InstancePtr.

Parameters

  InstancePtr | references the FIFO on which to operate.
  Word | is the data word to be written to FIFO.

Returns
  N/A

Note
  C-style signature: void XLlFifo_TxPutWord(XLlFifo *InstancePtr, u32 Word)

References XLlFifo::Datainterface, XLLF_AXI4_TDFD_OFFSET, XLLF_TDFD_OFFSET, and XLlFifo_WriteReg.

Referenced by TxSend(), and XLlFifo_iWrite_Aligned().

void XStrm_Read | ( | XStrm_RxFifoStreamer * | InstancePtr,
|  | void * | BufPtr,
|  | unsigned | Bytes
| ) |  |

XStrm_Read reads Bytes bytes from the FIFO specified by InstancePtr to the block of memory, referenced by BufPtr.

Care must be taken to ensure that the number of bytes read with one or more calls to XStrm_Read() does not exceed the number of bytes available given from the last call to XStrm_RxGetLen().

Parameters

  InstancePtr | references the FIFO on which to operate.
  BufPtr | specifies the memory address to place the data read.
  Bytes | specifies the number of bytes to read.

Returns
  N/A

References XStrm_RxFifoStreamer::FifoInstance, XStrm_RxFifoStreamer::FifoWidth, XStrm_RxFifoStreamer::FrmByteCnt, XStrm_RxFifoStreamer::HeadIndex, and XStrm_RxFifoStreamer::ReadFn.

u32 XStrm_RxGetLen | ( | XStrm_RxFifoStreamer * | InstancePtr | ) |

XStrm_RxGetLen notifies the hardware that the program is ready to receive the next frame from the receive channel of the FIFO, specified by InstancePtr.

Note that the program must first call XStrm_RxGetLen before pulling data out of the receive channel of the FIFO with XStrm_Read.

Parameters

  InstancePtr | references the FIFO on which to operate.

Returns
  XStrm_RxGetLen returns the number of bytes available in the next frame.

References XStrm_RxFifoStreamer::FifoInstance, XStrm_RxFifoStreamer::FifoWidth, XStrm_RxFifoStreamer::FrmByteCnt, XStrm_RxFifoStreamer::GetLenFn, and XStrm_RxFifoStreamer::HeadIndex.

void XStrm_RxInitialize | ( | XStrm_RxFifoStreamer * | InstancePtr,
|  | unsigned | FifoWidth,
|  | void * | FifoInstance,
|  | XStrm_XferFnType | ReadFn,
|  | XStrm_GetLenFnType | GetLenFn,
|  | XStrm_GetOccupancyFnType | GetOccupancyFn
| ) |  |

XStrm_RxInitialize initializes the XStrm_RxFifoStreamer object referenced by InstancePtr.

Parameters

  InstancePtr | references the tx streamer on which to operate.
  FifoWidth | specifies the FIFO keyhole size in bytes.
  FifoInstance | references the FIFO driver instance that this streamer object should use to transfer data into the the actual fifo.
  ReadFn | specifies a routine to use to read data from the actual FIFO. It is assumed that this read routine will handle only reads from an aligned buffer. (Otherwise, why are we using this streamer driver?)
  GetLenFn | specifies a routine to use to initiate a receive on the actual FIFO.
  GetOccupancyFn | specifies a routine to use to retrieve the occupancy in the actual FIFO. The true occupancy value needs to come through this streamer driver because it holds some of the bytes.

Returns
  N/A

References XStrm_RxFifoStreamer::FifoInstance, XStrm_RxFifoStreamer::FifoWidth, XStrm_RxFifoStreamer::GetLenFn, XStrm_RxFifoStreamer::GetOccupancyFn, XStrm_RxFifoStreamer::HeadIndex, and XStrm_RxFifoStreamer::ReadFn.

Referenced by XLlFifo_CfgInitialize(), and XLlFifo_Initialize().

void XStrm_TxInitialize | ( | XStrm_TxFifoStreamer * | InstancePtr,
|  | unsigned | FifoWidth,
|  | void * | FifoInstance,
|  | XStrm_XferFnType | WriteFn,
|  | XStrm_SetLenFnType | SetLenFn,
|  | XStrm_GetVacancyFnType | GetVacancyFn
| ) |  |

XStrm_TxInitialize initializes the XStrm_TxFifoStreamer object referenced by InstancePtr.

Parameters

  InstancePtr | references the tx streamer on which to operate.
  FifoWidth | specifies the FIFO keyhole size in bytes.
  FifoInstance | references the FIFO driver instance that this streamer object should use to transfer data into the the actual fifo.
  WriteFn | specifies a routine to use to write data into the actual FIFO. It is assumed that this write routine will handle only writes from an aligned buffer. (Otherwise, why are we using this streamer driver?)
  SetLenFn | specifies a routine to use to initiate a transmit on the actual FIFO.
  GetVacancyFn | specifies a routine to use to retrieve the vacancy in the actual FIFO. The true vacancy value needs to come through this streamer driver because it holds some of the bytes.

Returns
  N/A

References XStrm_TxFifoStreamer::FifoInstance, XStrm_TxFifoStreamer::FifoWidth, XStrm_TxFifoStreamer::GetVacancyFn, XStrm_TxFifoStreamer::SetLenFn, XStrm_TxFifoStreamer::TailIndex, and XStrm_TxFifoStreamer::WriteFn.

Referenced by XLlFifo_CfgInitialize(), and XLlFifo_Initialize().

void XStrm_TxSetLen | ( | XStrm_TxFifoStreamer * | InstancePtr,
|  | u32 | Bytes
| ) |  |

XStrm_TxSetLen flushes to the FIFO, specified by InstancePtr, any bytes remaining in internal buffers and begins a hardware transfer of data out of the transmit channel of the FIFO.

Bytes specifies the number of bytes in the frame to transmit.

Parameters

  InstancePtr | references the FIFO Streamer on which to operate.
  Bytes | specifies the frame length in bytes.

Returns
  N/A

References XStrm_TxFifoStreamer::FifoInstance, XStrm_TxFifoStreamer::TailIndex, and XStrm_TxFifoStreamer::WriteFn.

void XStrm_Write | ( | XStrm_TxFifoStreamer * | InstancePtr,
|  | void * | BufPtr,
|  | unsigned | Bytes
| ) |  |

XStrm_Write writes Bytes bytes of the block of memory, referenced by BufPtr, to the transmit channel of the FIFO referenced by InstancePtr.

Care must be taken to ensure that the number of bytes written with one or more calls to XStrm_Write() matches the number of bytes given in the next call to XStrm_TxSetLen().

Parameters

  InstancePtr | references the FIFO on which to operate.
  BufPtr | specifies the memory address of data to write.
  Bytes | specifies the number of bytes to write.

Returns
  N/A

References XStrm_TxFifoStreamer::FifoInstance, XStrm_TxFifoStreamer::FifoWidth, XStrm_TxFifoStreamer::TailIndex, and XStrm_TxFifoStreamer::WriteFn.