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Data Fields
XSdPs_Config Struct Reference
SDPS APIs

This typedef contains configuration information for the device. More...

## Data Fields
u16 | DeviceId
| Unique ID of device. More...
UINTPTR | BaseAddress
| Base address of the device. More...
u32 | InputClockHz
| Input clock frequency. More...
u32 | CardDetect
| Card Detect. More...
u32 | WriteProtect
| Write Protect. More...
u32 | BusWidth
| Bus Width. More...
u32 | BankNumber
| MIO Bank selection for SD. More...
u32 | HasEMIO
| If SD is connected to EMIO. More...
u8 | SlotType
| Slot type. More...
u8 | IsCacheCoherent
| If SD is Cache Coherent or not. More...
u32 | ITapDly_SDR_Clk50
| Input Tap delay for HSD/SDR25 modes. More...
u32 | OTapDly_SDR_Clk50
| Output Tap delay for HSD/SDR25 modes. More...
u32 | ITapDly_DDR_Clk50
| Input Tap delay for DDR50 modes. More...
u32 | OTapDly_DDR_Clk50
| Output Tap delay for DDR50 modes. More...
u32 | OTapDly_SDR_Clk100
| Input Tap delay for SDR50 modes. More...
u32 | OTapDly_SDR_Clk200
| Input Tap delay for SDR104/HS200 modes. More...
u32 | OTapDly_DDR_Clk200
| Input Tap delay for HS400 modes. More...

## Detailed Description

This typedef contains configuration information for the device.

## Field Documentation

u32 XSdPs_Config::BankNumber

MIO Bank selection for SD.

Referenced by XSdPs_CfgInitialize(), XSdPs_IdentifyEmmcMode(), and XSdPs_SetTapDelay_SDR104().

UINTPTR XSdPs_Config::BaseAddress

Base address of the device.

Referenced by XSdPs_AutoTuning(), XSdPs_CardIfCond(), XSdPs_CardOpCond(), XSdPs_CardSetVoltage18(), XSdPs_CfgInitialize(), XSdPs_Change_BusSpeed(), XSdPs_Change_BusWidth(), XSdPs_Change_ClkFreq(), XSdPs_Change_SdBusSpeed(), XSdPs_CheckBusHigh(), XSdPs_CheckBusIdle(), XSdPs_CheckCardDetect(), XSdPs_CheckResetDone(), XSdPs_CheckTransferComplete(), XSdps_CheckTransferDone(), XSdPs_CheckVoltage18(), XSdPs_CmdTransfer(), XSdPs_ConfigDma(), XSdPs_ConfigInterrupt(), XSdPs_ConfigPower(), XSdPs_ConfigTapDelay(), XSdPs_DisableBusPower(), XSdPs_DllReset(), XSdPs_DllRstCtrl(), XSdPs_EnableBusPower(), XSdPs_EnableClock(), XSdPs_Erase(), XSdPs_GetCardId(), XSdPs_GetCsd(), XSdPs_HostConfig(), XSdPs_IdentifyCard(), XSdPs_MmcCardInitialize(), XSdPs_Reset(), XSdPs_ResetConfig(), XSdPs_SendCmd(), XSdPs_SetBlkSize(), XSdPs_SetClock(), XSdPs_SetExecTuning(), XSdPs_Setup32ADMA2DescTbl(), XSdPs_Setup64ADMA2DescTbl(), XSdPs_SetupADMA2DescTbl64Bit(), XSdPs_SetupCmd(), XSdPs_SetupReadDma(), XSdPs_SetupTransfer(), XSdPs_SetupVoltageSwitch(), XSdPs_SetupWriteDma(), and XSdPs_SetVoltage18().

u32 XSdPs_Config::BusWidth

Bus Width.

Referenced by XSdPs_CardOpCond(), XSdPs_CfgInitialize(), XSdPs_Change_BusWidth(), XSdPs_EmmcModeInit(), XSdPs_SdCardInitialize(), and XSdPs_SdModeInit().

u32 XSdPs_Config::CardDetect

Card Detect.

Referenced by XSdPs_CfgInitialize(), XSdPs_CheckCardDetect(), XSdPs_Erase(), and XSdPs_SetupTransfer().

u16 XSdPs_Config::DeviceId

Unique ID of device.

Referenced by XSdPs_CfgInitialize().

u32 XSdPs_Config::HasEMIO

If SD is connected to EMIO.

Referenced by XSdPs_CfgInitialize().

u32 XSdPs_Config::InputClockHz

Input clock frequency.

Referenced by XSdPs_CalcClock(), XSdPs_CfgInitialize(), and XSdPs_Identify_UhsMode().

u8 XSdPs_Config::IsCacheCoherent

If SD is Cache Coherent or not.

Referenced by XSdPs_CfgInitialize(), XSdPs_Get_BusSpeed(), XSdPs_Get_BusWidth(), XSdPs_Get_Mmc_ExtCsd(), XSdPs_Get_Status(), XSdPs_ReadPolled(), XSdPs_Setup32ADMA2DescTbl(), XSdPs_Setup64ADMA2DescTbl(), XSdPs_SetupADMA2DescTbl64Bit(), XSdPs_SetupReadDma(), and XSdPs_SetupWriteDma().

u32 XSdPs_Config::ITapDly_DDR_Clk50

Input Tap delay for DDR50 modes.

Referenced by XSdPs_CfgInitialize(), XSdPs_IdentifyEmmcMode(), and XSdPs_SetTapDelay_DDR50().

u32 XSdPs_Config::ITapDly_SDR_Clk50

Input Tap delay for HSD/SDR25 modes.

Referenced by XSdPs_CfgInitialize(), XSdPs_IdentifyEmmcMode(), XSdPs_SdModeInit(), and XSdPs_SetTapDelay_SDR25().

u32 XSdPs_Config::OTapDly_DDR_Clk200

Input Tap delay for HS400 modes.

Referenced by XSdPs_CfgInitialize().

u32 XSdPs_Config::OTapDly_DDR_Clk50

Output Tap delay for DDR50 modes.

Referenced by XSdPs_CfgInitialize(), XSdPs_IdentifyEmmcMode(), and XSdPs_SetTapDelay_DDR50().

u32 XSdPs_Config::OTapDly_SDR_Clk100

Input Tap delay for SDR50 modes.

Referenced by XSdPs_CfgInitialize(), and XSdPs_SetTapDelay_SDR50().

u32 XSdPs_Config::OTapDly_SDR_Clk200

Input Tap delay for SDR104/HS200 modes.

Referenced by XSdPs_CfgInitialize(), XSdPs_IdentifyEmmcMode(), and XSdPs_SetTapDelay_SDR104().

u32 XSdPs_Config::OTapDly_SDR_Clk50

Output Tap delay for HSD/SDR25 modes.

Referenced by XSdPs_CfgInitialize(), XSdPs_IdentifyEmmcMode(), XSdPs_SdModeInit(), and XSdPs_SetTapDelay_SDR25().

u8 XSdPs_Config::SlotType

Slot type.

Referenced by XSdPs_CfgInitialize(), XSdPs_SdModeInit(), XSdPs_SetTapDelay_DDR50(), and XSdPs_SetTapDelay_SDR25().

u32 XSdPs_Config::WriteProtect

Write Protect.

Referenced by XSdPs_CfgInitialize().