| csudma Vitis Drivers API Documentation

- Overview
- Data Structures
- APIs
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Macros
xcsudma_hw.h File Reference

## Macros
#define | XCSUDMA_HW_H_
| Prevent circular inclusions by using protection macros. More...
#define | XCsuDma_In32 Xil_In32
| Input operation. More...
#define | XCsuDma_Out32 Xil_Out32
| Output operation. More...
#define | XCsuDma_ReadReg(BaseAddress, RegOffset) XCsuDma_In32((BaseAddress) + (u32)(RegOffset))
| This macro reads the given register. More...
#define | XCsuDma_WriteReg(BaseAddress, RegOffset, Data) XCsuDma_Out32((BaseAddress) + (u32)(RegOffset), (u32)(Data))
| This macro writes the value into the given register. More...
Registers offsets
#define | XCSUDMA_ADDR_OFFSET 0x000U
| Address Register Offset. More...
#define | XCSUDMA_SIZE_OFFSET 0x004U
| Size Register Offset. More...
#define | XCSUDMA_STS_OFFSET 0x008U
| Status Register Offset. More...
#define | XCSUDMA_CTRL_OFFSET 0x00CU
| Control Register Offset. More...
#define | XCSUDMA_I_STS_OFFSET 0x014U
| Interrupt Status Register Offset. More...
Size register bit masks and shifts
#define | XCSUDMA_SIZE_MASK 0x1FFFFFFCU
| Mask for size. More...
#define | XCSUDMA_LAST_WORD_MASK 0x00000001U
| Last word check bit mask. More...
#define | XCSUDMA_SIZE_SHIFT 2U
| Shift for size. More...
Interrupt Enable/Disable/Mask/Status registers bit masks
#define | XCSUDMA_IXR_FIFO_OVERFLOW_MASK 0x00000001U
| FIFO overflow mask, it is valid only to Destination Channel. More...
#define | XCSUDMA_IXR_INVALID_APB_MASK 0x00000040U
| Invalid APB access mask. More...
#define | XCSUDMA_IXR_FIFO_THRESHHIT_MASK 0x00000020U
| FIFO threshold hit indicator mask. More...
#define | XCSUDMA_IXR_TIMEOUT_MEM_MASK 0x00000010U
| Time out counter expired to access memory mask. More...
#define | XCSUDMA_IXR_TIMEOUT_STRM_MASK 0x00000008U
| Time out counter expired to access stream mask. More...
#define | XCSUDMA_IXR_AXI_WRERR_MASK 0x00000004U
| AXI Read/Write error mask. More...
#define | XCSUDMA_IXR_DONE_MASK 0x00000002U
| Done mask. More...
#define | XCSUDMA_IXR_MEM_DONE_MASK 0x00000001U
| Memory done mask, it is valid only for source channel. More...
#define | XCSUDMA_IXR_SRC_MASK 0x0000007FU
     ((XCSUDMA_IXR_INVALID_APB_MASK)|
(XCSUDMA_IXR_FIFO_THRESHHIT_MASK) | (XCSUDMA_IXR_TIMEOUT_MEM_MASK) | (XCSUDMA_IXR_TIMEOUT_STRM_MASK) | (XCSUDMA_IXR_AXI_WRERR_MASK) | (XCSUDMA_IXR_DONE_MASK) | (XCSUDMA_IXR_MEM_DONE_MASK)) More...
#define | XCSUDMA_IXR_DST_MASK 0x000000FEU
     ((XCSUDMA_IXR_FIFO_OVERFLOW_MASK) |
(XCSUDMA_IXR_INVALID_APB_MASK) | (XCSUDMA_IXR_FIFO_THRESHHIT_MASK) | (XCSUDMA_IXR_TIMEOUT_MEM_MASK) | (XCSUDMA_IXR_TIMEOUT_STRM_MASK) | (XCSUDMA_IXR_AXI_WRERR_MASK) | (XCSUDMA_IXR_DONE_MASK)) More...
Software done timeout value
#define | XCSUDMA_DONE_TIMEOUT_VAL 300000000U
| SW timeout loop value for transfer completion. More...