| v_hdmitx1 Vitis Drivers API Documentation

- Overview
- Data Structures
- APIs
- File List

Data Structures | Macros
xv_hdmitx1.h File Reference

## Overview

This is the main header file for Xilinx HDMI TX core.

HDMI TX core is used for transmitting the incoming video and audio streams. It consists of

- Transmitter core
- AXI4-Stream to Video Bridge
- Video Timing Controller and
- High-bandwidth Digital Content Protection (HDCP) (Optional).

The HDMI TX uses three AXI interfaces for Video, Audio and Processor:

- AXI4-Stream interface for Video, can be single, dual or quad pixels per clock and supports 8 and 10 bits per component.
- AXI4-Stream interface for Audio, accepts multiple channels uncompressed and compressed audio data.
- AXI4-Lite interface for processor, controls the transmitter. Please do refer AXI Reference Guide (UG761) for more information on AXI interfaces.

Transmitter core performs following operations:

- Converts video data from the video clock domain into the link clock domain.
- TMDS (Transition Minimized Differential Signaling) encoding.
- Merges encoded video data and packet data into a single HDMI stream.
- Optional HDMI stream is encrypted by an external HDCP module.
- Over samples HDMI stream if stream bandwidth is too low for the transceiver to handle.
- Scrambles encrypted/HDMI stream if data rate is above 3.4 Gbps otherwise bypasses the Scrambler.

AXI Video Bridge converts the incoming video AXI-stream to native video.

Video Timing Controller (VTC) generates the native video timing.

Core Features

For a full description of HDMI TX features, please see the hardware specification.

Software Initialization & Configuration

The application needs to do following steps in order for preparing the HDMI TX core to be ready.

- Call XV_HdmiTx1_LookupConfig using a device ID to find the core configuration.
- Call XV_HdmiTx1_CfgInitialize to initialize the device and the driver instance associated with it.

Interrupts

This driver provides interrupt handlers

- XV_HdmiTx1_IntrHandler, for handling the interrupts from the HDMI TX core PIO and DDC peripheral respectively.

Application developer needs to register interrupt handler with the processor, within their examples. Whenever processor calls registered application's interrupt handler associated with interrupt id, application's interrupt handler needs to call appropriate peripheral interrupt handler reading peripheral's Status register.

This driver provides XV_HdmiTx1_SetCallback API to register functions with HDMI TX core instance.

Virtual Memory

This driver supports Virtual Memory. The RTOS is responsible for calculating the correct device base address in Virtual Memory space.

Threads

This driver is not thread safe. Any needs for threads or thread mutual exclusion must be satisfied by the layer above this driver.

Asserts

Asserts are used within all Xilinx drivers to enforce constraints on argument values. Asserts can be turned off on a system-wide basis by defining at compile time, the NDEBUG identifier. By default, asserts are turned on and it is recommended that users leave asserts on during development.

Building the driver

The HDMI TX driver is composed of several source files. This allows the user to build and link only those parts of the driver that are necessary.

     MODIFICATION HISTORY:
    s
     Ver   Who    Date     Changes

     1.00  EB     22/05/18 Initial release.

## Data Structures
struct | XV_HdmiTx1_ScdcField
| This typedef contains DDC registers offset, mask, shift. More...
struct | XV_HdmiTx1_Config
| This typedef contains configuration information for the HDMI TX core. More...
struct | XV_HdmiTx1_AudioStream
| This typedef contains audio stream specific data structure. More...
struct | XV_HdmiTx1_Stream
| This typedef contains HDMI TX stream specific data structure. More...
struct | XV_HdmiTx1
| The XV_HdmiTx1 driver instance data. More...

## Macros
#define | XV_HDMITX1_H_
| Prevent circular inclusions by using protection macros. More...

## Enumerations
Handler Types
enum | XV_HdmiTx1_HandlerType
| These constants specify different types of handler and used to differentiate interrupt requests from peripheral. More...
HDMI TX stream status
enum | XV_HdmiTx1_State
HDMI TX audio format
enum | XV_HdmiTx1_AudioFormatType
HDMI TX SCDC Fields
enum | XV_HdmiTx1_ScdcFieldType

## HDMI TX CTS and N Source
#define | XV_HdmiTx1_GetTime1Ms(InstancePtr) (InstancePtr)->Config.AxiLiteClkFreq/1000
| This macro returns the clock cycles required to count up to 1MS with respect to AXI Lite Frequency. More...
#define | XV_HdmiTx1_GetTime10Ms(InstancePtr) (InstancePtr)->Config.AxiLiteClkFreq/100
| This macro returns the clock cycles required to count up to 10MS with respect to AXI Lite Frequency. More...
#define | XV_HdmiTx1_GetVersion(InstancePtr)
| This macro reads the TX version. More...
#define | XV_HdmiTx1_Reset(InstancePtr, Reset)
| This macro asserts or releases the HDMI TX reset. More...
#define | XV_HdmiTx1_SetScrambler(InstancePtr, SetClr)
| This macro controls the HDMI TX Scrambler. More...
#define | XV_HdmiTx1_Bridge_yuv420(InstancePtr, SetClr)
| This macro controls the YUV420 mode for video bridge. More...
#define | XV_HdmiTx1_Bridge_pixel(InstancePtr, SetClr)
| This macro controls the Pixel Repeat mode for video bridge. More...
#define | XV_HdmiTx1_PioEnable(InstancePtr)
| This macro enables the HDMI TX PIO peripheral. More...
#define | XV_HdmiTx1_PioDisable(InstancePtr)
| This macro disables the HDMI TX PIO peripheral. More...
#define | XV_HdmiTx1_PioIntrEnable(InstancePtr)
| This macro enables interrupt in the HDMI TX PIO peripheral. More...
#define | XV_HdmiTx1_PioIntrDisable(InstancePtr)
| This macro disables interrupt in the HDMI TX PIO peripheral. More...
#define | XV_HdmiTx1_PioIntrClear(InstancePtr)
| This macro clears HDMI TX PIO interrupt. More...
#define | XV_HdmiTx1_DdcEnable(InstancePtr)
| This macro enables the HDMI TX Display Data Channel (DDC) peripheral. More...
#define | XV_HdmiTx1_DdcDisable(InstancePtr)
| This macro disables the HDMI TX Display Data Channel (DDC) peripheral. More...
#define | XV_HdmiTx1_DdcIntrEnable(InstancePtr)
| This macro enables interrupt in the HDMI TX DDC peripheral. More...
#define | XV_HdmiTx1_DdcIntrDisable(InstancePtr)
| This macro disables interrupt in the HDMI TX DDC peripheral. More...
#define | XV_HdmiTx1_DdcIntrClear(InstancePtr)
| This macro clears HDMI TX DDC interrupt. More...
#define | XV_HdmiTx1_AuxDisable(InstancePtr)
| This macro disables the HDMI TX Auxiliary (AUX) peripheral. More...
#define | XV_HdmiTx1_AuxIntrEnable(InstancePtr)
| This macro enables interrupt in the HDMI TX AUX peripheral. More...
#define | XV_HdmiTx1_VrrControl(InstancePtr, SetClr)
| This macro allows enabling/disabling of VRR in HDMI Tx. More...
#define | XV_HdmiTx1_FSyncControl(InstancePtr, SetClr)
| This macro allows enabling/disabling of FSync in HDMI Tx. More...
#define | XV_HdmiTx1_DynHdr_DM_Enable(InstancePtr)
| This macro enables the data mover for Dynamic HDR in HDMI Tx. More...
#define | XV_HdmiTx1_DynHdr_DM_Disable(InstancePtr)
| This macro disables the data mover for Dynamic HDR in HDMI Tx. More...
#define | XV_HdmiTx1_DynHdr_Control(InstancePtr, SetClr)
| This macro allows enabling/disabling of Dynamic HDR in HDMI Tx. More...
#define | XV_HdmiTx1_DynHdr_FAPA_Control(InstancePtr, SetClr)
| This macro allows enabling/disabling of FAPA Location Dynamic HDR in HDMI Tx. More...
#define | XV_HdmiTx1_DynHdr_GOF_Control(InstancePtr, SetClr)
| This macro allows enabling/disabling of GOF Dynamic HDR in HDMI Tx. More...
#define | XV_HdmiTx1_DynHdr_GOFVal_Control(InstancePtr, SetClr)
| This macro allows set/clear of GOF Value Dynamic HDR in HDMI Tx. More...
#define | XV_HdmiTx1_DynHdr_MTW_Clear(InstancePtr)
| This macro allows to set the MTW bit to clear it for Dynamic HDR in HDMI Tx. More...
#define | XV_HdmiTx1_DynHdr_GetReadStatus(InstancePtr)
| This macro gets the read status of Data Mover for Dynamic HDR in HDMI Tx. More...
#define | XV_HdmiTx1_DynHdr_SetPacket(InstancePtr, PktLen, PktType)
| This macro sets the Header packet type and length for Dynamic HDR in HDMI Tx. More...
#define | XV_HdmiTx1_DynHdr_SetAddr(InstancePtr, Addr)
| This macro sets the buffer address for Dynamic HDR in HDMI Tx. More...
#define | XV_HdmiTx1_AuxIntrDisable(InstancePtr)
| This macro disables interrupt in the HDMI TX AUX peripheral. More...
#define | XV_HdmiTx1_AudioDisable(InstancePtr)
| This macro disables audio in HDMI TX core. More...
#define | XV_HdmiTx1_SetMode(InstancePtr)
| This macro sets the mode bit. More...
#define | XV_HdmiTx1_ClearMode(InstancePtr)
| This macro clears the mode bit. More...
#define | XV_HdmiTx1_GetMode(InstancePtr)
| This macro provides the current mode. More...
#define | XV_HdmiTx1_GetSampleRate(InstancePtr) (InstancePtr)->Stream.SampleRate
| This macro provides the current sample rate. More...
#define | XV_HdmiTx1_GetAudioChannels(InstancePtr) (InstancePtr)->Stream.Audio.Channels
| This macro provides the active audio channels. More...
#define | XV_HdmiTx1_GetPixelPackingPhase(InstancePtr)
| This macro provides the current pixel packing phase. More...
#define | XV_HdmiTx1_MaskDisable(InstancePtr)
| This macro disables video mask in HDMI TX core. More...
#define | XV_HdmiTx1_MaskEnable(InstancePtr)
| This macro enables video mask in HDMI TX core. More...
#define | XV_HdmiTx1_MaskNoise(InstancePtr, SetClr)
| This macro enables or disables the noise in the video mask. More...
#define | XV_HdmiTx1_MaskSetRed(InstancePtr, Value)
| This macro sets the red component value in the video mask. More...
#define | XV_HdmiTx1_MaskSetGreen(InstancePtr, Value)
| This macro sets the green component value in the video mask. More...
#define | XV_HdmiTx1_MaskSetBlue(InstancePtr, Value)
| This macro sets the blue component value in the video mask. More...
#define | XV_HdmiTx1_IsMasked(InstancePtr)
| This macro provides the current video mask mode. More...
#define | XV_HdmiTx1_DscControl(InstancePtr, SetClr)
| This macro allows enabling/disabling of DSC in HDMI-TX. More...
enum | XV_HdmiTx1_CTSNSource
typedef void(* | XV_HdmiTx1_Callback )(void *CallbackRef)
| Callback type for Vsync event interrupt. More...
XV_HdmiTx1_Config * | XV_HdmiTx1_LookupConfig (u16 DeviceId)
| This function returns a reference to an XV_HdmiTx1_Config structure based on the core id, DeviceId. More...
int | XV_HdmiTx1_CfgInitialize (XV_HdmiTx1 *InstancePtr, XV_HdmiTx1_Config *CfgPtr, UINTPTR EffectiveAddr)
| This function initializes the HDMI TX core. More...
void | XV_HdmiTx1_SetHdmiFrlMode (XV_HdmiTx1 *InstancePtr)
| This function sets the core into HDMI FRL mode. More...
void | XV_HdmiTx1_SetHdmiTmdsMode (XV_HdmiTx1 *InstancePtr)
| This function sets the core into HDMI TMDS mode. More...
void | XV_HdmiTx1_SetDviMode (XV_HdmiTx1 *InstancePtr)
| This function sets the core into DVI mode. More...
void | XV_HdmiTx1_AuxEnable (XV_HdmiTx1 *InstancePtr)
| This function enables the HDMI TX Auxiliary (AUX) peripheral. More...
void | XV_HdmiTx1_AudioEnable (XV_HdmiTx1 *InstancePtr)
| This macro enables audio in HDMI TX core. More...
void | XV_HdmiTx1_Clear (XV_HdmiTx1 *InstancePtr)
| This function clear the HDMI TX variables and sets it to the defaults. More...
u8 | XV_HdmiTx1_LookupVic (XVidC_VideoMode VideoMode)
| This function provides video identification code of video mode. More...
XVidC_VideoMode | XV_HdmiTx1_GetVideoModeFromVic (u8 Vic)
u32 | XV_HdmiTx1_SetStream (XV_HdmiTx1 *InstancePtr, XVidC_VideoTiming VideoTiming, XVidC_FrameRate FrameRate, XVidC_ColorFormat ColorFormat, XVidC_ColorDepth Bpc, XVidC_PixelsPerClock Ppc, XVidC_3DInfo *Info3D, u8 FVaFactor, u8 VrrEnabled, u8 CnmvrrEnabled, u64 *TmdsClk)
| This function sets the HDMI TX stream parameters. More...
u64 | XV_HdmiTx1_GetTmdsClk (XV_HdmiTx1 *InstancePtr)
| This function sets and return the TMDS Clock based on Video Parameter from the InstancePtr. More...
void | XV_HdmiTx1_INT_VRST (XV_HdmiTx1 *InstancePtr, u8 Reset)
| This function asserts or releases the HDMI TX Internal VRST. More...
void | XV_HdmiTx1_INT_LRST (XV_HdmiTx1 *InstancePtr, u8 Reset)
| This function asserts or releases the HDMI TX Internal LRST. More...
void | XV_HdmiTx1_EXT_VRST (XV_HdmiTx1 *InstancePtr, u8 Reset)
| This function asserts or releases the HDMI TX External VRST. More...
void | XV_HdmiTx1_EXT_SYSRST (XV_HdmiTx1 *InstancePtr, u8 Reset)
| This function asserts or releases the HDMI TX External SYSRST. More...
void | XV_HdmiTx1_SetGcpAvmuteBit (XV_HdmiTx1 *InstancePtr)
| This function sets the HDMI TX AUX GCP register AVMUTE bit. More...
void | XV_HdmiTx1_ClearGcpAvmuteBit (XV_HdmiTx1 *InstancePtr)
| This function clears the HDMI TX AUX GCP register AVMUTE bit. More...
void | XV_HdmiTx1_SetGcpClearAvmuteBit (XV_HdmiTx1 *InstancePtr)
| This function sets the HDMI TX AUX GCP register CLEAR_AVMUTE bit. More...
void | XV_HdmiTx1_ClearGcpClearAvmuteBit (XV_HdmiTx1 *InstancePtr)
| This function clears the HDMI TX AUX GCP register CLEAR_AVMUTE bit. More...
void | XV_HdmiTx1_SetPixelRate (XV_HdmiTx1 *InstancePtr)
| This function sets the pixel rate at output. More...
void | XV_HdmiTx1_SetSampleRate (XV_HdmiTx1 *InstancePtr, u8 SampleRate)
| This function sets the sample rate at output. More...
void | XV_HdmiTx1_SetColorFormat (XV_HdmiTx1 *InstancePtr)
| This function sets the color format. More...
void | XV_HdmiTx1_SetColorDepth (XV_HdmiTx1 *InstancePtr)
| This function sets the color depth. More...
int | XV_HdmiTx1_IsStreamScrambled (XV_HdmiTx1 *InstancePtr)
| This function provides status of the stream. More...
int | XV_HdmiTx1_IsStreamConnected (XV_HdmiTx1 *InstancePtr)
| This function provides the stream connected status. More...
void | XV_HdmiTx1_SetAxiClkFreq (XV_HdmiTx1 *InstancePtr, u32 ClkFreq)
| This function sets the AXI4-Lite Clock Frequency. More...
void | XV_HdmiTx1_DdcInit (XV_HdmiTx1 *InstancePtr, u32 Frequency)
| This function prepares TX DDC peripheral to use. More...
int | XV_HdmiTx1_DdcWrite (XV_HdmiTx1 *InstancePtr, u8 Slave, u16 Length, u8 *Buffer, u8 Stop)
| This function writes data from DDC peripheral from given slave address. More...
int | XV_HdmiTx1_DdcRead (XV_HdmiTx1 *InstancePtr, u8 Slave, u16 Length, u8 *Buffer, u8 Stop)
| This function reads data from DDC peripheral from given slave address. More...
int | XV_HdmiTx1_DdcReadReg (XV_HdmiTx1 *InstancePtr, u8 Slave, u16 Length, u8 RegAddr, u8 *Buffer)
| This function reads specified register from DDC peripheral from given slave address. More...
int | XV_HdmiTx1_DdcWriteField (XV_HdmiTx1 *InstancePtr, XV_HdmiTx1_ScdcFieldType Field, u8 Value)
| This function writes the specified SCDC Field. More...
void | XV_HdmiTx1_Aux_Dsc_Send_Header (XV_HdmiTx1 *InstancePtr, u32 Data)
| This function transmits the DSC packet header. More...
void | XV_HdmiTx1_Aux_Dsc_Send_Data (XV_HdmiTx1 *InstancePtr, u32 Data)
| This function transmits the DSC packet data. More...
u32 | XV_HdmiTx1_AuxSend (XV_HdmiTx1 *InstancePtr)
| This function transmits the infoframes generated by the processor. More...
int | XV_HdmiTx1_Scrambler (XV_HdmiTx1 *InstancePtr)
| This function controls the scrambler. More...
int | XV_HdmiTx1_ClockRatio (XV_HdmiTx1 *InstancePtr)
| This function controls the TMDS clock ratio. More...
int | XV_HdmiTx1_DetectHdmi20 (XV_HdmiTx1 *InstancePtr)
| This function detects connected sink is a HDMI 2.0/HDMI 1.4 sink device and sets appropriate flag in the TX stream. More...
void | XV_HdmiTx1_ShowSCDC (XV_HdmiTx1 *InstancePtr)
| This function shows the sinks SCDC registers. More...
void | XV_HdmiTx1_Info (XV_HdmiTx1 *InstancePtr)
| This function prints stream and timing information on STDIO/Uart console. More...
void | XV_HdmiTx1_DebugInfo (XV_HdmiTx1 *InstancePtr)
| This function prints debug information on STDIO/UART console. More...
void | XV_HdmiTx1_RegisterDebug (XV_HdmiTx1 *InstancePtr)
| This function prints out HDMI TX register. More...
int | XV_HdmiTx1_SetAudioChannels (XV_HdmiTx1 *InstancePtr, u8 Value)
| This function sets the active audio channels. More...
int | XV_HdmiTx1_SetAudioFormat (XV_HdmiTx1 *InstancePtr, XV_HdmiTx1_AudioFormatType Value)
| This function sets the active audio format. More...
XV_HdmiTx1_AudioFormatType | XV_HdmiTx1_GetAudioFormat (XV_HdmiTx1 *InstancePtr)
| This function gets the active audio format. More...
u32 | XV_HdmiTxSs1_GetAudioCtsVal (XV_HdmiTx1 *InstancePtr)
| This function gets the Generated ACR CTS Value. More...
u32 | XV_HdmiTxSs1_GetAudioNVal (XV_HdmiTx1 *InstancePtr)
| This function gets the programmed ACR N Value. More...
void | XV_HdmiTx1_FRLACRStart (XV_HdmiTx1 *InstancePtr)
| This function Starts the internal ACR module for FRL. More...
void | XV_HdmiTx1_TMDSACRStart (XV_HdmiTx1 *InstancePtr)
| This function Starts the internal ACR module for FRL. More...
int | XV_HdmiTx1_StartTmdsMode (XV_HdmiTx1 *InstancePtr)
| This function starts the TMDS mode. More...
int | XV_HdmiTx1_StartFrlTraining (XV_HdmiTx1 *InstancePtr, XHdmiC_MaxFrlRate FrlRate)
| This function starts the Fixed Rate Link Training. More...
void | XV_HdmiTx1_SetFrlMaxFrlRate (XV_HdmiTx1 *InstancePtr, XHdmiC_MaxFrlRate MaxFrlRate)
| This function sets maximum FRL Rate supported by the system. More...
int | XV_HdmiTx1_ExecFrlState (XV_HdmiTx1 *InstancePtr)
| This function executes the different of states of FRL. More...
int | XV_HdmiTx1_FrlStreamStart (XV_HdmiTx1 *InstancePtr)
| This function starts FRL video stream. More...
int | XV_HdmiTx1_FrlStreamStop (XV_HdmiTx1 *InstancePtr)
| This function stops FRL video stream. More...
void | XV_HdmiTx1_SetFrlLtp (XV_HdmiTx1 *InstancePtr, u8 Lane, XV_HdmiTx1_FrlLtpType Ltp)
| This function sets the link training pattern for the selected lane. More...
void | XV_HdmiTx1_SetFrlActive (XV_HdmiTx1 *InstancePtr, XV_HdmiTx1_FrlActiveMode Mode)
| This function sets active FRL mode. More...
void | XV_HdmiTx1_SetFrlLanes (XV_HdmiTx1 *InstancePtr, u8 Lanes)
| This function sets the number of FRL lane in operations. More...
void | XV_HdmiTx1_FrlModeEn (XV_HdmiTx1 *InstancePtr, u8 Mode)
| This function sets the FRL operation mode. More...
void | XV_HdmiTx1_FrlReset (XV_HdmiTx1 *InstancePtr, u8 Reset)
| This function resets the FRL peripheral. More...
int | XV_HdmiTx1_FrlRate (XV_HdmiTx1 *InstancePtr, u8 FrlRate)
| This function sets the TX core's FRL Rate and sends encoded FRL_Rate data and FFE Levels to the sink through SCDC. More...
void | XV_HdmiTx1_FrlExtVidCkeSource (XV_HdmiTx1 *InstancePtr, u8 Value)
| This function sets the source of the video clock enable. More...
void | XV_HdmiTx1_FrlExecute (XV_HdmiTx1 *InstancePtr)
| This function executes the FRL register updates. More...
int | XV_HdmiTx1_FrlTrainingInit (XV_HdmiTx1 *InstancePtr)
| This function initializes FRL peripheral and sink's SCDC for FRL Training. More...
void | XV_HdmiTx1_SetFrlTimer (XV_HdmiTx1 *InstancePtr, u32 Milliseconds)
| This function sets the timer of TX Core's FRL peripheral. More...
void | XV_HdmiTx1_SetFrlTimerClockCycles (XV_HdmiTx1 *InstancePtr, u32 ClockCycles)
| This function sets the timer of TX Core's FRL peripheral in clock cycles. More...
u32 | XV_HdmiTx1_GetFrlTimer (XV_HdmiTx1 *InstancePtr)
| This function returns the remaining value of the timer of TX Core's FRL peripheral. More...
void | XV_HdmiTx1_SetFrl10MicroSecondsTimer (XV_HdmiTx1 *InstancePtr)
| This function sets the timer of TX Core's FRL peripheral for 10 Microseconds. More...
void | XV_HdmiTx1_SetFrlWrongLtp (XV_HdmiTx1 *InstancePtr)
| This function sets the core to send out wrong LTP on one of the channel to prevent link training from passing. More...
void | XV_HdmiTx1_ClearFrlWrongLtp (XV_HdmiTx1 *InstancePtr)
| This function clears the debugging flag which would have prevented the core from sending out correct LTP. More...
u8 * | XV_HdmiTx1_GetScdcEdRegisters (XV_HdmiTx1 *InstancePtr)
| This function reads the CED and RSED registers from the sink and returns the pointer to the data structure which stores the CED related readings (from SCDC register 0x50 to 0x5A). More...
void | XV_HdmiTx1_Start (XV_HdmiTx1 *InstancePtr)
| This function starts the HDMI TX core. More...
void | XV_HdmiTx1_Stop (XV_HdmiTx1 *InstancePtr)
| This function stops the HDMI TX core. More...
int | XV_HdmiTx1_SelfTest (XV_HdmiTx1 *InstancePtr)
| This function reads ID of HDMI TX PIO peripheral. More...
void | XV_HdmiTx1_IntrHandler (void *InstancePtr)
| This function is the interrupt handler for the HDMI TX driver. More...
int | XV_HdmiTx1_SetCallback (XV_HdmiTx1 *InstancePtr, XV_HdmiTx1_HandlerType HandlerType, void *CallbackFunc, void *CallbackRef)
| This function installs an asynchronous callback function for the given HandlerType: More...
XV_HdmiC_VideoTimingExtMeta * | XV_HdmiTx1_GetVidTimingExtMeta (XV_HdmiTx1 *InstancePtr)
XV_HdmiC_SrcProdDescIF * | XV_HdmiTx1_GetSrcProdDescIF (XV_HdmiTx1 *InstancePtr)
void | XV_HdmiTx1_GenerateVideoTimingExtMetaIF (XV_HdmiTx1 *InstancePtr, XV_HdmiC_VideoTimingExtMeta *ExtMeta)
void | XV_HdmiTx1_GenerateCustomVideoTimingExtMetaIF (XV_HdmiTx1 *InstancePtr, XV_HdmiC_VideoTimingExtMeta *ExtMeta, u16 Sync, u16 DataSetLen)
void | XV_HdmiTx1_GenerateSrcProdDescInfoframe (XV_HdmiTx1 *InstancePtr, XV_HdmiC_SrcProdDescIF *SpdIfPtr)

## Macro Definition Documentation

#define XV_HdmiTx1_AudioDisable | ( |  | InstancePtr | ) |

Value:
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_AUD_CTRL_CLR_OFFSET), \
(XV_HDMITX1_AUD_CTRL_RUN_MASK))
XV_HDMITX1_AUD_CTRL_CLR_OFFSET
#define XV_HDMITX1_AUD_CTRL_CLR_OFFSET
AUD Control Register Clear * offset.
Definition: xv_hdmitx1_hw.h:469
XV_HDMITX1_AUD_CTRL_RUN_MASK
#define XV_HDMITX1_AUD_CTRL_RUN_MASK
AUD Control Run mask.
Definition: xv_hdmitx1_hw.h:483
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763

This macro disables audio in HDMI TX core.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_AudioDisable(XV_HdmiTx1 *InstancePtr)

Referenced by XV_HdmiTx1_CfgInitialize(), and XV_HdmiTx1_SetDviMode().

#define XV_HdmiTx1_AuxDisable | ( |  | InstancePtr | ) |

Value:
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_AUX_CTRL_CLR_OFFSET), \
(XV_HDMITX1_AUX_CTRL_RUN_MASK))
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_AUX_CTRL_RUN_MASK
#define XV_HDMITX1_AUX_CTRL_RUN_MASK
AUX Control Run mask.
Definition: xv_hdmitx1_hw.h:378
XV_HDMITX1_AUX_CTRL_CLR_OFFSET
#define XV_HDMITX1_AUX_CTRL_CLR_OFFSET
AUX Control Register Clear * offset.
Definition: xv_hdmitx1_hw.h:360

This macro disables the HDMI TX Auxiliary (AUX) peripheral.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_AuxDisable(XV_HdmiTx1 *InstancePtr)

Referenced by XV_HdmiTx1_CfgInitialize(), XV_HdmiTx1_FrlStreamStop(), and XV_HdmiTx1_SetDviMode().

#define XV_HdmiTx1_AuxIntrDisable | ( |  | InstancePtr | ) |

Value:
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_AUX_CTRL_CLR_OFFSET), \
(XV_HDMITX1_AUX_CTRL_IE_MASK))
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_AUX_CTRL_IE_MASK
#define XV_HDMITX1_AUX_CTRL_IE_MASK
AUX Control Interrupt Enable mask.
Definition: xv_hdmitx1_hw.h:379
XV_HDMITX1_AUX_CTRL_CLR_OFFSET
#define XV_HDMITX1_AUX_CTRL_CLR_OFFSET
AUX Control Register Clear * offset.
Definition: xv_hdmitx1_hw.h:360

This macro disables interrupt in the HDMI TX AUX peripheral.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_AuxIntrDisable(XV_HdmiTx1 *InstancePtr)

Referenced by XV_HdmiTx1_FrlStreamStop().

#define XV_HdmiTx1_AuxIntrEnable | ( |  | InstancePtr | ) |

Value:
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_AUX_CTRL_SET_OFFSET), \
(XV_HDMITX1_AUX_CTRL_IE_MASK))
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_AUX_CTRL_SET_OFFSET
#define XV_HDMITX1_AUX_CTRL_SET_OFFSET
AUX Control Register Set * offset.
Definition: xv_hdmitx1_hw.h:357
XV_HDMITX1_AUX_CTRL_IE_MASK
#define XV_HDMITX1_AUX_CTRL_IE_MASK
AUX Control Interrupt Enable mask.
Definition: xv_hdmitx1_hw.h:379

This macro enables interrupt in the HDMI TX AUX peripheral.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_AuxIntrEnable(XV_HdmiTx1 *InstancePtr)

Referenced by XV_HdmiTx1_FrlStreamStart().

#define XV_HdmiTx1_Bridge_pixel | ( |  | InstancePtr,
|  |  | SetClr
| ) |  |

Value:
{ \
if (SetClr) { \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_PIO_OUT_SET_OFFSET), \
(XV_HDMITX1_PIO_OUT_BRIDGE_PIXEL_MASK)); \
} \
else { \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_PIO_OUT_CLR_OFFSET), \
(XV_HDMITX1_PIO_OUT_BRIDGE_PIXEL_MASK)); \
} \
}
XV_HDMITX1_PIO_OUT_CLR_OFFSET
#define XV_HDMITX1_PIO_OUT_CLR_OFFSET
PIO Out Register Clear * offset.
Definition: xv_hdmitx1_hw.h:153
XV_HDMITX1_PIO_OUT_BRIDGE_PIXEL_MASK
#define XV_HDMITX1_PIO_OUT_BRIDGE_PIXEL_MASK
PIO Out Bridge_Pixel repeat mask.
Definition: xv_hdmitx1_hw.h:231
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_PIO_OUT_SET_OFFSET
#define XV_HDMITX1_PIO_OUT_SET_OFFSET
PIO Out Register Set * offset.
Definition: xv_hdmitx1_hw.h:150

This macro controls the Pixel Repeat mode for video bridge.

Parameters

  InstancePtr | is a pointer to the XHdmi_Tx core instance.
  SetClr | specifies TRUE/FALSE value to either enable or disable the Pixel Repitition Support.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_Bridge_pixel(XV_HdmiTx1 *InstancePtr, u8 SetClr)

#define XV_HdmiTx1_Bridge_yuv420 | ( |  | InstancePtr,
|  |  | SetClr
| ) |  |

Value:
{ \
if (SetClr) { \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_PIO_OUT_SET_OFFSET), \
(XV_HDMITX1_PIO_OUT_BRIDGE_YUV420_MASK)); \
} \
else { \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_PIO_OUT_CLR_OFFSET), \
(XV_HDMITX1_PIO_OUT_BRIDGE_YUV420_MASK)); \
} \
}
XV_HDMITX1_PIO_OUT_CLR_OFFSET
#define XV_HDMITX1_PIO_OUT_CLR_OFFSET
PIO Out Register Clear * offset.
Definition: xv_hdmitx1_hw.h:153
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_PIO_OUT_SET_OFFSET
#define XV_HDMITX1_PIO_OUT_SET_OFFSET
PIO Out Register Set * offset.
Definition: xv_hdmitx1_hw.h:150
XV_HDMITX1_PIO_OUT_BRIDGE_YUV420_MASK
#define XV_HDMITX1_PIO_OUT_BRIDGE_YUV420_MASK
PIO Out Bridge_YUV420 mask.
Definition: xv_hdmitx1_hw.h:228

This macro controls the YUV420 mode for video bridge.

Parameters

  InstancePtr | is a pointer to the XHdmi_Tx core instance.
  SetClr | specifies TRUE/FALSE value to either enable or disable the YUV 420 Support.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_Bridge_yuv420(XV_HdmiTx1 *InstancePtr, u8 SetClr)

#define XV_HdmiTx1_ClearMode | ( |  | InstancePtr | ) |

Value:
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_PIO_OUT_CLR_OFFSET), \
(XV_HDMITX1_PIO_OUT_MODE_MASK))
XV_HDMITX1_PIO_OUT_CLR_OFFSET
#define XV_HDMITX1_PIO_OUT_CLR_OFFSET
PIO Out Register Clear * offset.
Definition: xv_hdmitx1_hw.h:153
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_PIO_OUT_MODE_MASK
#define XV_HDMITX1_PIO_OUT_MODE_MASK
PIO Out Mode mask.
Definition: xv_hdmitx1_hw.h:197

This macro clears the mode bit.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_ClearMode(XV_HdmiTx1 *InstancePtr)

Referenced by XV_HdmiTx1_SetDviMode().

#define XV_HdmiTx1_DdcDisable | ( |  | InstancePtr | ) |

Value:
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_DDC_CTRL_CLR_OFFSET), \
(XV_HDMITX1_DDC_CTRL_RUN_MASK))
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_DDC_CTRL_CLR_OFFSET
#define XV_HDMITX1_DDC_CTRL_CLR_OFFSET
DDC Control Register Clear * offset.
Definition: xv_hdmitx1_hw.h:295
XV_HDMITX1_DDC_CTRL_RUN_MASK
#define XV_HDMITX1_DDC_CTRL_RUN_MASK
DDC Control Run mask.
Definition: xv_hdmitx1_hw.h:309

This macro disables the HDMI TX Display Data Channel (DDC) peripheral.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_DdcDisable(XV_HdmiTx1 *InstancePtr)

Referenced by XV_HdmiTx1_CfgInitialize(), XV_HdmiTx1_DdcRead(), and XV_HdmiTx1_DdcWrite().

#define XV_HdmiTx1_DdcEnable | ( |  | InstancePtr | ) |

Value:
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_DDC_CTRL_SET_OFFSET), \
(XV_HDMITX1_DDC_CTRL_RUN_MASK))
XV_HDMITX1_DDC_CTRL_SET_OFFSET
#define XV_HDMITX1_DDC_CTRL_SET_OFFSET
DDC Control Register Set * offset.
Definition: xv_hdmitx1_hw.h:292
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_DDC_CTRL_RUN_MASK
#define XV_HDMITX1_DDC_CTRL_RUN_MASK
DDC Control Run mask.
Definition: xv_hdmitx1_hw.h:309

This macro enables the HDMI TX Display Data Channel (DDC) peripheral.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_DdcEnable(XV_HdmiTx1 *InstancePtr)

Referenced by XV_HdmiTx1_DdcRead(), and XV_HdmiTx1_DdcWrite().

#define XV_HdmiTx1_DdcIntrClear | ( |  | InstancePtr | ) |

Value:
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_DDC_STA_OFFSET), \
(XV_HDMITX1_DDC_STA_IRQ_MASK))
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_DDC_STA_IRQ_MASK
#define XV_HDMITX1_DDC_STA_IRQ_MASK
DDC Status IRQ mask.
Definition: xv_hdmitx1_hw.h:323
XV_HDMITX1_DDC_STA_OFFSET
#define XV_HDMITX1_DDC_STA_OFFSET
DDC Status Register * offset.
Definition: xv_hdmitx1_hw.h:298

This macro clears HDMI TX DDC interrupt.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_DdcIntrClear(XV_HdmiTx1 *InstancePtr)

Referenced by XV_HdmiTx1_CfgInitialize().

#define XV_HdmiTx1_DdcIntrDisable | ( |  | InstancePtr | ) |

Value:
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_DDC_CTRL_CLR_OFFSET), \
(XV_HDMITX1_DDC_CTRL_IE_MASK))
XV_HDMITX1_DDC_CTRL_IE_MASK
#define XV_HDMITX1_DDC_CTRL_IE_MASK
DDC Control Interrupt Enable mask.
Definition: xv_hdmitx1_hw.h:310
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_DDC_CTRL_CLR_OFFSET
#define XV_HDMITX1_DDC_CTRL_CLR_OFFSET
DDC Control Register Clear * offset.
Definition: xv_hdmitx1_hw.h:295

This macro disables interrupt in the HDMI TX DDC peripheral.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_DdcIntrDisable(XV_HdmiTx1 *InstancePtr)

Referenced by XV_HdmiTx1_DdcRead(), and XV_HdmiTx1_DdcWrite().

#define XV_HdmiTx1_DdcIntrEnable | ( |  | InstancePtr | ) |

Value:
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_DDC_CTRL_SET_OFFSET), \
(XV_HDMITX1_DDC_CTRL_IE_MASK))
XV_HDMITX1_DDC_CTRL_SET_OFFSET
#define XV_HDMITX1_DDC_CTRL_SET_OFFSET
DDC Control Register Set * offset.
Definition: xv_hdmitx1_hw.h:292
XV_HDMITX1_DDC_CTRL_IE_MASK
#define XV_HDMITX1_DDC_CTRL_IE_MASK
DDC Control Interrupt Enable mask.
Definition: xv_hdmitx1_hw.h:310
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763

This macro enables interrupt in the HDMI TX DDC peripheral.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_DdcIntrEnable(XV_HdmiTx1 *InstancePtr)

#define XV_HdmiTx1_DscControl | ( |  | InstancePtr,
|  |  | SetClr
| ) |  |

Value:
{ \
if (SetClr) { \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_AUX_CTRL_SET_OFFSET), \
(XV_HDMITX1_AUX_CTRL_DSC_EN_MASK)); \
} \
else { \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_AUX_CTRL_CLR_OFFSET), \
(XV_HDMITX1_AUX_CTRL_DSC_EN_MASK)); \
} \
}
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_AUX_CTRL_DSC_EN_MASK
#define XV_HDMITX1_AUX_CTRL_DSC_EN_MASK
AUX Control DSC En mask.
Definition: xv_hdmitx1_hw.h:388
XV_HDMITX1_AUX_CTRL_SET_OFFSET
#define XV_HDMITX1_AUX_CTRL_SET_OFFSET
AUX Control Register Set * offset.
Definition: xv_hdmitx1_hw.h:357
XV_HDMITX1_AUX_CTRL_CLR_OFFSET
#define XV_HDMITX1_AUX_CTRL_CLR_OFFSET
AUX Control Register Clear * offset.
Definition: xv_hdmitx1_hw.h:360

This macro allows enabling/disabling of DSC in HDMI-TX.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  SetClr | specifies TRUE/FALSE value to either enable or disable the DSC

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_DscControl(XV_HdmiTx1 *InstancePtr, u8 SetClr)

#define XV_HdmiTx1_DynHdr_Control | ( |  | InstancePtr,
|  |  | SetClr
| ) |  |

Value:
{ \
if (InstancePtr->Config.DynHdr) { \
if (SetClr) { \
XV_HdmiTx1_DynHdr_DM_Enable(InstancePtr); \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_AUX_CTRL_SET_OFFSET), \
(XV_HDMITX1_AUX_CTRL_DYNHDR_EN_MASK)); \
} \
else { \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_AUX_CTRL_CLR_OFFSET), \
(XV_HDMITX1_AUX_CTRL_DYNHDR_EN_MASK)); \
XV_HdmiTx1_DynHdr_DM_Disable(InstancePtr); \
} \
} \
}
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_AUX_CTRL_DYNHDR_EN_MASK
#define XV_HDMITX1_AUX_CTRL_DYNHDR_EN_MASK
AUX Control Enable Dynamic HDR mask.
Definition: xv_hdmitx1_hw.h:384
XV_HDMITX1_AUX_CTRL_SET_OFFSET
#define XV_HDMITX1_AUX_CTRL_SET_OFFSET
AUX Control Register Set * offset.
Definition: xv_hdmitx1_hw.h:357
XV_HdmiTx1_DynHdr_DM_Enable
#define XV_HdmiTx1_DynHdr_DM_Enable(InstancePtr)
This macro enables the data mover for Dynamic HDR in HDMI Tx.
Definition: xv_hdmitx1.h:892
XV_HdmiTx1_DynHdr_DM_Disable
#define XV_HdmiTx1_DynHdr_DM_Disable(InstancePtr)
This macro disables the data mover for Dynamic HDR in HDMI Tx.
Definition: xv_hdmitx1.h:914
XV_HDMITX1_AUX_CTRL_CLR_OFFSET
#define XV_HDMITX1_AUX_CTRL_CLR_OFFSET
AUX Control Register Clear * offset.
Definition: xv_hdmitx1_hw.h:360

This macro allows enabling/disabling of Dynamic HDR in HDMI Tx.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  SetClr | specifies TRUE/FALSE value to either enable or disable the Dynamic HDR

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_DynHdrControl(XV_HdmiTx1 *InstancePtr, u8 SetClr)

#define XV_HdmiTx1_DynHdr_DM_Disable | ( |  | InstancePtr | ) |

Value:
{ \
if (InstancePtr->Config.DynHdr) { \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
XV_HDMITX1_PIO_OUT_CLR_OFFSET, \
XV_HDMITX1_PIO_OUT_DYN_HDR_DM_EN_MASK); \
} \
}
XV_HDMITX1_PIO_OUT_CLR_OFFSET
#define XV_HDMITX1_PIO_OUT_CLR_OFFSET
PIO Out Register Clear * offset.
Definition: xv_hdmitx1_hw.h:153
XV_HDMITX1_PIO_OUT_DYN_HDR_DM_EN_MASK
#define XV_HDMITX1_PIO_OUT_DYN_HDR_DM_EN_MASK
PIO Out Dynamic HDR Data Mover Enable.
Definition: xv_hdmitx1_hw.h:249
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763

This macro disables the data mover for Dynamic HDR in HDMI Tx.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_DynHdr_DM_Disable(XV_HdmiTx1 *InstancePtr)

Referenced by XV_HdmiTx1_FrlStreamStop().

#define XV_HdmiTx1_DynHdr_DM_Enable | ( |  | InstancePtr | ) |

Value:
{ \
if (InstancePtr->Config.DynHdr) { \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
XV_HDMITX1_PIO_OUT_SET_OFFSET, \
XV_HDMITX1_PIO_OUT_DYN_HDR_DM_EN_MASK); \
} \
}
XV_HDMITX1_PIO_OUT_DYN_HDR_DM_EN_MASK
#define XV_HDMITX1_PIO_OUT_DYN_HDR_DM_EN_MASK
PIO Out Dynamic HDR Data Mover Enable.
Definition: xv_hdmitx1_hw.h:249
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_PIO_OUT_SET_OFFSET
#define XV_HDMITX1_PIO_OUT_SET_OFFSET
PIO Out Register Set * offset.
Definition: xv_hdmitx1_hw.h:150

This macro enables the data mover for Dynamic HDR in HDMI Tx.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_DynHdr_DM_Enable(XV_HdmiTx1 *InstancePtr)

Referenced by XV_HdmiTx1_FrlStreamStart().

#define XV_HdmiTx1_DynHdr_FAPA_Control | ( |  | InstancePtr,
|  |  | SetClr
| ) |  |

Value:
{ \
if (InstancePtr->Config.DynHdr) { \
if (SetClr) { \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_AUX_CTRL_SET_OFFSET), \
(XV_HDMITX1_AUX_CTRL_DYNHDR_FAPA_LOC_MASK)); \
} \
else { \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_AUX_CTRL_CLR_OFFSET), \
(XV_HDMITX1_AUX_CTRL_DYNHDR_FAPA_LOC_MASK)); \
} \
} \
}
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_AUX_CTRL_DYNHDR_FAPA_LOC_MASK
#define XV_HDMITX1_AUX_CTRL_DYNHDR_FAPA_LOC_MASK
AUX Control FAPA Location value mask.
Definition: xv_hdmitx1_hw.h:387
XV_HDMITX1_AUX_CTRL_SET_OFFSET
#define XV_HDMITX1_AUX_CTRL_SET_OFFSET
AUX Control Register Set * offset.
Definition: xv_hdmitx1_hw.h:357
XV_HDMITX1_AUX_CTRL_CLR_OFFSET
#define XV_HDMITX1_AUX_CTRL_CLR_OFFSET
AUX Control Register Clear * offset.
Definition: xv_hdmitx1_hw.h:360

This macro allows enabling/disabling of FAPA Location Dynamic HDR in HDMI Tx.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  SetClr | specifies TRUE/FALSE value for FAPA location.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_DynHdr_FAPA_Control(XV_HdmiTx1 *InstancePtr, u8 SetClr)

#define XV_HdmiTx1_DynHdr_GetReadStatus | ( |  | InstancePtr | ) |

Value:
(XV_HdmiTx1_ReadReg((InstancePtr)->Config.BaseAddress, \
XV_HDMITX1_AUX_STA_OFFSET) & \
XV_HDMITX1_AUX_DYNHDR_RD_STS_MASK);
XV_HDMITX1_AUX_DYNHDR_RD_STS_MASK
#define XV_HDMITX1_AUX_DYNHDR_RD_STS_MASK
AUX Status Dynamic HDR read response.
Definition: xv_hdmitx1_hw.h:420
XV_HdmiTx1_ReadReg
#define XV_HdmiTx1_ReadReg(BaseAddress, RegOffset)
This macro reads a value from a HDMI TX register.
Definition: xv_hdmitx1_hw.h:742
XV_HDMITX1_AUX_STA_OFFSET
#define XV_HDMITX1_AUX_STA_OFFSET
AUX Status Register * offset.
Definition: xv_hdmitx1_hw.h:363

This macro gets the read status of Data Mover for Dynamic HDR in HDMI Tx.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  u32 val - 0 means ok else memory read error

Note
  C-style signature: u32 XV_HdmiTx1_DynHdr_GetReadStatus(XV_HdmiTx1 *InstancePtr)

#define XV_HdmiTx1_DynHdr_GOF_Control | ( |  | InstancePtr,
|  |  | SetClr
| ) |  |

Value:
{ \
if (InstancePtr->Config.DynHdr) { \
if (SetClr) { \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_AUX_CTRL_SET_OFFSET), \
(XV_HDMITX1_AUX_CTRL_DYNHDR_GOF_EN_MASK)); \
} \
else { \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_AUX_CTRL_CLR_OFFSET), \
(XV_HDMITX1_AUX_CTRL_DYNHDR_GOF_EN_MASK)); \
} \
} \
}
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_AUX_CTRL_DYNHDR_GOF_EN_MASK
#define XV_HDMITX1_AUX_CTRL_DYNHDR_GOF_EN_MASK
AUX Control Enable Graphic Overlay Flag mask.
Definition: xv_hdmitx1_hw.h:385
XV_HDMITX1_AUX_CTRL_SET_OFFSET
#define XV_HDMITX1_AUX_CTRL_SET_OFFSET
AUX Control Register Set * offset.
Definition: xv_hdmitx1_hw.h:357
XV_HDMITX1_AUX_CTRL_CLR_OFFSET
#define XV_HDMITX1_AUX_CTRL_CLR_OFFSET
AUX Control Register Clear * offset.
Definition: xv_hdmitx1_hw.h:360

This macro allows enabling/disabling of GOF Dynamic HDR in HDMI Tx.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  SetClr | specifies TRUE/FALSE value to either enable or disable the GOF (Graphics Overlay Flag)

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_DynHdr_GOF_Control(XV_HdmiTx1 *InstancePtr, u8 SetClr)

#define XV_HdmiTx1_DynHdr_GOFVal_Control | ( |  | InstancePtr,
|  |  | SetClr
| ) |  |

Value:
{ \
if (InstancePtr->Config.DynHdr) { \
if (SetClr) { \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_AUX_CTRL_SET_OFFSET), \
(XV_HDMITX1_AUX_CTRL_DYNHDR_GOF_VAL_MASK)); \
} \
else { \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_AUX_CTRL_CLR_OFFSET), \
(XV_HDMITX1_AUX_CTRL_DYNHDR_GOF_VAL_MASK)); \
} \
} \
}
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_AUX_CTRL_DYNHDR_GOF_VAL_MASK
#define XV_HDMITX1_AUX_CTRL_DYNHDR_GOF_VAL_MASK
AUX Control Graphic Overlay Flag value mask.
Definition: xv_hdmitx1_hw.h:386
XV_HDMITX1_AUX_CTRL_SET_OFFSET
#define XV_HDMITX1_AUX_CTRL_SET_OFFSET
AUX Control Register Set * offset.
Definition: xv_hdmitx1_hw.h:357
XV_HDMITX1_AUX_CTRL_CLR_OFFSET
#define XV_HDMITX1_AUX_CTRL_CLR_OFFSET
AUX Control Register Clear * offset.
Definition: xv_hdmitx1_hw.h:360

This macro allows set/clear of GOF Value Dynamic HDR in HDMI Tx.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  SetClr | specifies TRUE/FALSE value to either set or clear the GOF (Graphics Overlay Flag) Value

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_DynHdr_GOFVal_Control(XV_HdmiTx1 *InstancePtr, u8 SetClr)

#define XV_HdmiTx1_DynHdr_MTW_Clear | ( |  | InstancePtr | ) |

Value:
{ \
u32 val; \
if (InstancePtr->Config.DynHdr) { \
val = XV_HdmiTx1_ReadReg((InstancePtr)->Config.BaseAddress, \
XV_HDMITX1_AUX_STA_OFFSET); \
val |= XV_HDMITX1_AUX_STA_DYNHDR_MTW_MASK; \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_AUX_STA_OFFSET), \
val); \
} \
}
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_AUX_STA_DYNHDR_MTW_MASK
#define XV_HDMITX1_AUX_STA_DYNHDR_MTW_MASK
AUX Status Dynamic HDR MTW started.
Definition: xv_hdmitx1_hw.h:416
XV_HdmiTx1_ReadReg
#define XV_HdmiTx1_ReadReg(BaseAddress, RegOffset)
This macro reads a value from a HDMI TX register.
Definition: xv_hdmitx1_hw.h:742
XV_HDMITX1_AUX_STA_OFFSET
#define XV_HDMITX1_AUX_STA_OFFSET
AUX Status Register * offset.
Definition: xv_hdmitx1_hw.h:363

This macro allows to set the MTW bit to clear it for Dynamic HDR in HDMI Tx.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_DynHdr_MTW_Clear(XV_HdmiTx1 *InstancePtr)

#define XV_HdmiTx1_DynHdr_SetAddr | ( |  | InstancePtr,
|  |  | Addr
| ) |  |

Value:
{ \
if (InstancePtr->Config.DynHdr) { \
u32 val; \
val = (u32)Addr; \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
XV_HDMITX1_AUX_DYNHDR_ADDR_LSB_OFFSET, \
val); \
val = (u32)(((u64)Addr & 0xFFFFFFFF00000000) >> 32); \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
XV_HDMITX1_AUX_DYNHDR_ADDR_MSB_OFFSET, \
val); \
} \
}
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_AUX_DYNHDR_ADDR_LSB_OFFSET
#define XV_HDMITX1_AUX_DYNHDR_ADDR_LSB_OFFSET
AUX Dynamic HDR Address LSB offset.
Definition: xv_hdmitx1_hw.h:373
XV_HDMITX1_AUX_DYNHDR_ADDR_MSB_OFFSET
#define XV_HDMITX1_AUX_DYNHDR_ADDR_MSB_OFFSET
AUX Dynamic HDR Address MSB offset.
Definition: xv_hdmitx1_hw.h:374

This macro sets the buffer address for Dynamic HDR in HDMI Tx.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  Addr | is a u64 which contains the buffer address

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_DynHdr_SetAddr(XV_HdmiTx1 *InstancePtr, u64 Addr)

#define XV_HdmiTx1_DynHdr_SetPacket | ( |  | InstancePtr,
|  |  | PktLen,
|  |  | PktType
| ) |  |

Value:
{ \
if (InstancePtr->Config.DynHdr) { \
u32 val = (u16)PktType | \
((u16)PktLen << XV_HDMITX1_AUX_DYNHDR_PKT_LENGTH_SHIFT); \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
XV_HDMITX1_AUX_DYNHDR_PKT_OFFSET, \
val); \
} \
}
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_AUX_DYNHDR_PKT_OFFSET
#define XV_HDMITX1_AUX_DYNHDR_PKT_OFFSET
AUX Dynamic HDR Packet offset.
Definition: xv_hdmitx1_hw.h:372

This macro sets the Header packet type and length for Dynamic HDR in HDMI Tx.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  PktLength | is a u16 length of Dynamic HDR packet.
  PktType | is a u16 Type of Dynamic HDR packet.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_DynHdr_SetPacket(XV_HdmiTx1 *InstancePtr, u16 PacketLength, u16 PacketType)

#define XV_HdmiTx1_FSyncControl | ( |  | InstancePtr,
|  |  | SetClr
| ) |  |

Value:
{ \
if (SetClr) { \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_AUX_CTRL_SET_OFFSET), \
(XV_HDMITX1_AUX_CTRL_FYSYNC_EN_MASK)); \
} \
else { \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_AUX_CTRL_CLR_OFFSET), \
(XV_HDMITX1_AUX_CTRL_FYSYNC_EN_MASK)); \
} \
}
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_AUX_CTRL_SET_OFFSET
#define XV_HDMITX1_AUX_CTRL_SET_OFFSET
AUX Control Register Set * offset.
Definition: xv_hdmitx1_hw.h:357
XV_HDMITX1_AUX_CTRL_FYSYNC_EN_MASK
#define XV_HDMITX1_AUX_CTRL_FYSYNC_EN_MASK
AUX Control FSync En mask.
Definition: xv_hdmitx1_hw.h:383
XV_HDMITX1_AUX_CTRL_CLR_OFFSET
#define XV_HDMITX1_AUX_CTRL_CLR_OFFSET
AUX Control Register Clear * offset.
Definition: xv_hdmitx1_hw.h:360

This macro allows enabling/disabling of FSync in HDMI Tx.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  SetClr | specifies TRUE/FALSE value to either enable or disable the VFP Event

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_FSyncControl(XV_HdmiTx1 *InstancePtr, u8 SetClr)

#define XV_HdmiTx1_GetAudioChannels | ( |  | InstancePtr | ) | (InstancePtr)->Stream.Audio.Channels

This macro provides the active audio channels.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  Audio channels

#define XV_HdmiTx1_GetMode | ( |  | InstancePtr | ) |

Value:
(XV_HdmiTx1_ReadReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_PIO_OUT_OFFSET)) & \
(XV_HDMITX1_PIO_OUT_MODE_MASK))
XV_HDMITX1_PIO_OUT_MODE_MASK
#define XV_HDMITX1_PIO_OUT_MODE_MASK
PIO Out Mode mask.
Definition: xv_hdmitx1_hw.h:197
XV_HDMITX1_PIO_OUT_OFFSET
#define XV_HDMITX1_PIO_OUT_OFFSET
PIO Out Register offset.
Definition: xv_hdmitx1_hw.h:147
XV_HdmiTx1_ReadReg
#define XV_HdmiTx1_ReadReg(BaseAddress, RegOffset)
This macro reads a value from a HDMI TX register.
Definition: xv_hdmitx1_hw.h:742

This macro provides the current mode.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  Current mode. 0 = DVI 1 = HDMI

Note
  C-style signature: u8 XV_HdmiTx1_GetMode(XV_HdmiTx1 *InstancePtr)

#define XV_HdmiTx1_GetPixelPackingPhase | ( |  | InstancePtr | ) |

Value:
(((XV_HdmiTx1_ReadReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_PIO_IN_OFFSET))) >> \
(XV_HDMITX1_PIO_IN_PPP_SHIFT)) & \
(XV_HDMITX1_PIO_IN_PPP_MASK))
XV_HDMITX1_PIO_IN_PPP_SHIFT
#define XV_HDMITX1_PIO_IN_PPP_SHIFT
PIO In Pixel packing phase shift.
Definition: xv_hdmitx1_hw.h:270
XV_HDMITX1_PIO_IN_PPP_MASK
#define XV_HDMITX1_PIO_IN_PPP_MASK
PIO In Pixel packing phase mask.
Definition: xv_hdmitx1_hw.h:264
XV_HdmiTx1_ReadReg
#define XV_HdmiTx1_ReadReg(BaseAddress, RegOffset)
This macro reads a value from a HDMI TX register.
Definition: xv_hdmitx1_hw.h:742
XV_HDMITX1_PIO_IN_OFFSET
#define XV_HDMITX1_PIO_IN_OFFSET
PIO In Register offset.
Definition: xv_hdmitx1_hw.h:159

This macro provides the current pixel packing phase.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  Pixel packing phase.

#define XV_HdmiTx1_GetSampleRate | ( |  | InstancePtr | ) | (InstancePtr)->Stream.SampleRate

This macro provides the current sample rate.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  Sample rate

Note
  C-style signature: u8 XV_HdmiTx1_GetSampleRate(XV_HdmiTx1 *InstancePtr)

#define XV_HdmiTx1_GetTime10Ms | ( |  | InstancePtr | ) | (InstancePtr)->Config.AxiLiteClkFreq/100

This macro returns the clock cycles required to count up to 10MS with respect to AXI Lite Frequency.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTX core instance.

Returns
  None.

#define XV_HdmiTx1_GetTime1Ms | ( |  | InstancePtr | ) | (InstancePtr)->Config.AxiLiteClkFreq/1000

This macro returns the clock cycles required to count up to 1MS with respect to AXI Lite Frequency.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTX1 core instance.

Returns
  None.

Referenced by XV_HdmiTx1_CfgInitialize().

#define XV_HdmiTx1_GetVersion | ( |  | InstancePtr | ) |

Value:
XV_HdmiTx1_ReadReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_VER_VERSION_OFFSET))
XV_HDMITX1_VER_VERSION_OFFSET
#define XV_HDMITX1_VER_VERSION_OFFSET
VER Version Register * offset.
Definition: xv_hdmitx1_hw.h:81
XV_HdmiTx1_ReadReg
#define XV_HdmiTx1_ReadReg(BaseAddress, RegOffset)
This macro reads a value from a HDMI TX register.
Definition: xv_hdmitx1_hw.h:742

This macro reads the TX version.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTX1 core instance.

Returns
  None.

#define XV_HDMITX1_H_

Prevent circular inclusions by using protection macros.

#define XV_HdmiTx1_IsMasked | ( |  | InstancePtr | ) |

Value:
XV_HdmiTx1_ReadReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_MASK_CTRL_OFFSET)) & \
(XV_HDMITX1_MASK_CTRL_RUN_MASK)
XV_HDMITX1_MASK_CTRL_RUN_MASK
#define XV_HDMITX1_MASK_CTRL_RUN_MASK
MASK Control Run mask.
Definition: xv_hdmitx1_hw.h:556
XV_HDMITX1_MASK_CTRL_OFFSET
#define XV_HDMITX1_MASK_CTRL_OFFSET
MASK Control Register offset.
Definition: xv_hdmitx1_hw.h:533
XV_HdmiTx1_ReadReg
#define XV_HdmiTx1_ReadReg(BaseAddress, RegOffset)
This macro reads a value from a HDMI TX register.
Definition: xv_hdmitx1_hw.h:742

This macro provides the current video mask mode.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  Current mode. 0 = Video masking is disabled 1 = Video masking is enabled

Note
  C-style signature: u8 XV_HdmiTx1_IsMasked(XV_HdmiTx1 *InstancePtr)

#define XV_HdmiTx1_MaskDisable | ( |  | InstancePtr | ) |

Value:
{ \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_MASK_CTRL_CLR_OFFSET), \
(XV_HDMITX1_MASK_CTRL_RUN_MASK)); \
}
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_MASK_CTRL_CLR_OFFSET
#define XV_HDMITX1_MASK_CTRL_CLR_OFFSET
MASK Control Register Clear offset.
Definition: xv_hdmitx1_hw.h:539
XV_HDMITX1_MASK_CTRL_RUN_MASK
#define XV_HDMITX1_MASK_CTRL_RUN_MASK
MASK Control Run mask.
Definition: xv_hdmitx1_hw.h:556

This macro disables video mask in HDMI TX core.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_MaskDisable(XV_HdmiTx1 *InstancePtr)

#define XV_HdmiTx1_MaskEnable | ( |  | InstancePtr | ) |

Value:
{ \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_MASK_CTRL_SET_OFFSET), \
(XV_HDMITX1_MASK_CTRL_RUN_MASK)); \
}
XV_HDMITX1_MASK_CTRL_SET_OFFSET
#define XV_HDMITX1_MASK_CTRL_SET_OFFSET
MASK Control Register Set offset.
Definition: xv_hdmitx1_hw.h:536
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_MASK_CTRL_RUN_MASK
#define XV_HDMITX1_MASK_CTRL_RUN_MASK
MASK Control Run mask.
Definition: xv_hdmitx1_hw.h:556

This macro enables video mask in HDMI TX core.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_MaskEnable(XV_HdmiTx1 *InstancePtr)

#define XV_HdmiTx1_MaskNoise | ( |  | InstancePtr,
|  |  | SetClr
| ) |  |

Value:
{ \
if (SetClr) { \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_MASK_CTRL_SET_OFFSET), \
(XV_HDMITX1_MASK_CTRL_NOISE_MASK)); \
} \
else { \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_MASK_CTRL_CLR_OFFSET), \
(XV_HDMITX1_MASK_CTRL_NOISE_MASK)); \
} \
}
XV_HDMITX1_MASK_CTRL_SET_OFFSET
#define XV_HDMITX1_MASK_CTRL_SET_OFFSET
MASK Control Register Set offset.
Definition: xv_hdmitx1_hw.h:536
XV_HDMITX1_MASK_CTRL_NOISE_MASK
#define XV_HDMITX1_MASK_CTRL_NOISE_MASK
MASK Control Noise.
Definition: xv_hdmitx1_hw.h:557
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_MASK_CTRL_CLR_OFFSET
#define XV_HDMITX1_MASK_CTRL_CLR_OFFSET
MASK Control Register Clear offset.
Definition: xv_hdmitx1_hw.h:539

This macro enables or disables the noise in the video mask.

Parameters

  InstancePtr | is a pointer to the XHdmi_Tx core instance.
  SetClr | specifies TRUE/FALSE value to either enable or disable the Noise.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_MaskNoise(XV_HdmiTx1 *InstancePtr, u8 SetClr)

#define XV_HdmiTx1_MaskSetBlue | ( |  | InstancePtr,
|  |  | Value
| ) |  |

Value:
{ \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_MASK_BLUE_OFFSET), \
(Value)); \
}
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_MASK_BLUE_OFFSET
#define XV_HDMITX1_MASK_BLUE_OFFSET
MASK Blue Component Register offset.
Definition: xv_hdmitx1_hw.h:551

This macro sets the blue component value in the video mask.

Parameters

  InstancePtr | is a pointer to the XHdmi_Tx core instance.
  Value |

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_MaskSetBlue(XV_HdmiTx1 *InstancePtr, u16 Value)

#define XV_HdmiTx1_MaskSetGreen | ( |  | InstancePtr,
|  |  | Value
| ) |  |

Value:
{ \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_MASK_GREEN_OFFSET), \
(Value)); \
}
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_MASK_GREEN_OFFSET
#define XV_HDMITX1_MASK_GREEN_OFFSET
MASK Green Component Register offset.
Definition: xv_hdmitx1_hw.h:548

This macro sets the green component value in the video mask.

Parameters

  InstancePtr | is a pointer to the XHdmi_Tx core instance.
  Value |

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_MaskSetGreen(XV_HdmiTx1 *InstancePtr, u16 Value)

#define XV_HdmiTx1_MaskSetRed | ( |  | InstancePtr,
|  |  | Value
| ) |  |

Value:
{ \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_MASK_RED_OFFSET), \
(Value)); \
}
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_MASK_RED_OFFSET
#define XV_HDMITX1_MASK_RED_OFFSET
MASK Red Component Register offset.
Definition: xv_hdmitx1_hw.h:545

This macro sets the red component value in the video mask.

Parameters

  InstancePtr | is a pointer to the XHdmi_Tx core instance.
  Value |

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_MaskSetRed(XV_HdmiTx1 *InstancePtr, u16 Value)

#define XV_HdmiTx1_PioDisable | ( |  | InstancePtr | ) |

Value:
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_PIO_CTRL_CLR_OFFSET), \
(XV_HDMITX1_PIO_CTRL_RUN_MASK))
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_PIO_CTRL_RUN_MASK
#define XV_HDMITX1_PIO_CTRL_RUN_MASK
PIO Control Run mask.
Definition: xv_hdmitx1_hw.h:186
XV_HDMITX1_PIO_CTRL_CLR_OFFSET
#define XV_HDMITX1_PIO_CTRL_CLR_OFFSET
PIO Control Register Clear * offset.
Definition: xv_hdmitx1_hw.h:141

This macro disables the HDMI TX PIO peripheral.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_PioDisable(XV_HdmiTx1 *InstancePtr)

Referenced by XV_HdmiTx1_CfgInitialize(), and XV_HdmiTx1_Stop().

#define XV_HdmiTx1_PioEnable | ( |  | InstancePtr | ) |

Value:
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_PIO_CTRL_SET_OFFSET), \
(XV_HDMITX1_PIO_CTRL_RUN_MASK))
XV_HDMITX1_PIO_CTRL_SET_OFFSET
#define XV_HDMITX1_PIO_CTRL_SET_OFFSET
PIO Control Register Set * offset.
Definition: xv_hdmitx1_hw.h:138
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_PIO_CTRL_RUN_MASK
#define XV_HDMITX1_PIO_CTRL_RUN_MASK
PIO Control Run mask.
Definition: xv_hdmitx1_hw.h:186

This macro enables the HDMI TX PIO peripheral.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_PioEnable(XV_HdmiTx1 *InstancePtr)

Referenced by XV_HdmiTx1_Start().

#define XV_HdmiTx1_PioIntrClear | ( |  | InstancePtr | ) |

Value:
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_PIO_STA_OFFSET), \
(XV_HDMITX1_PIO_STA_IRQ_MASK))
XV_HDMITX1_PIO_STA_IRQ_MASK
#define XV_HDMITX1_PIO_STA_IRQ_MASK
PIO Status Interrupt mask.
Definition: xv_hdmitx1_hw.h:192
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_PIO_STA_OFFSET
#define XV_HDMITX1_PIO_STA_OFFSET
PIO Status Register * offset.
Definition: xv_hdmitx1_hw.h:144

This macro clears HDMI TX PIO interrupt.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_PioIntrClear(XV_HdmiTx1 *InstancePtr)

Referenced by XV_HdmiTx1_CfgInitialize().

#define XV_HdmiTx1_PioIntrDisable | ( |  | InstancePtr | ) |

Value:
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_PIO_CTRL_CLR_OFFSET), \
(XV_HDMITX1_PIO_CTRL_IE_MASK))
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_PIO_CTRL_CLR_OFFSET
#define XV_HDMITX1_PIO_CTRL_CLR_OFFSET
PIO Control Register Clear * offset.
Definition: xv_hdmitx1_hw.h:141
XV_HDMITX1_PIO_CTRL_IE_MASK
#define XV_HDMITX1_PIO_CTRL_IE_MASK
PIO Control Interrupt Enable mask.
Definition: xv_hdmitx1_hw.h:187

This macro disables interrupt in the HDMI TX PIO peripheral.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_PioIntrDisable(XV_HdmiTx1 *InstancePtr)

Referenced by XV_HdmiTx1_DdcRead(), XV_HdmiTx1_DdcWrite(), and XV_HdmiTx1_Stop().

#define XV_HdmiTx1_PioIntrEnable | ( |  | InstancePtr | ) |

Value:
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_PIO_CTRL_SET_OFFSET), \
(XV_HDMITX1_PIO_CTRL_IE_MASK))
XV_HDMITX1_PIO_CTRL_SET_OFFSET
#define XV_HDMITX1_PIO_CTRL_SET_OFFSET
PIO Control Register Set * offset.
Definition: xv_hdmitx1_hw.h:138
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_PIO_CTRL_IE_MASK
#define XV_HDMITX1_PIO_CTRL_IE_MASK
PIO Control Interrupt Enable mask.
Definition: xv_hdmitx1_hw.h:187

This macro enables interrupt in the HDMI TX PIO peripheral.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_PioIntrEnable(XV_HdmiTx1 *InstancePtr)

Referenced by XV_HdmiTx1_DdcRead(), XV_HdmiTx1_DdcWrite(), and XV_HdmiTx1_Start().

#define XV_HdmiTx1_Reset | ( |  | InstancePtr,
|  |  | Reset
| ) |  |

Value:
{ \
if (Reset) { \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_PIO_OUT_CLR_OFFSET), \
(XV_HDMITX1_PIO_OUT_RST_MASK)); \
} \
else { \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_PIO_OUT_SET_OFFSET), \
(XV_HDMITX1_PIO_OUT_RST_MASK)); \
} \
}
XV_HDMITX1_PIO_OUT_CLR_OFFSET
#define XV_HDMITX1_PIO_OUT_CLR_OFFSET
PIO Out Register Clear * offset.
Definition: xv_hdmitx1_hw.h:153
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_PIO_OUT_RST_MASK
#define XV_HDMITX1_PIO_OUT_RST_MASK
PIO Out Reset mask.
Definition: xv_hdmitx1_hw.h:196
XV_HDMITX1_PIO_OUT_SET_OFFSET
#define XV_HDMITX1_PIO_OUT_SET_OFFSET
PIO Out Register Set * offset.
Definition: xv_hdmitx1_hw.h:150

This macro asserts or releases the HDMI TX reset.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  Reset | specifies TRUE/FALSE value to either assert or release HDMI TX reset.

Returns
  None.

Note
  The reset output of the PIO is inverted. When the system is in reset, the PIO output is cleared and this will reset the HDMI . Therefore, clearing the PIO reset output will assert the HDMI link and video reset. C-style signature: void XV_HdmiTx1_Reset(XV_HdmiTx1 *InstancePtr, u8 Reset)

#define XV_HdmiTx1_SetMode | ( |  | InstancePtr | ) |

Value:
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_PIO_OUT_SET_OFFSET), \
(XV_HDMITX1_PIO_OUT_MODE_MASK))
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_PIO_OUT_MODE_MASK
#define XV_HDMITX1_PIO_OUT_MODE_MASK
PIO Out Mode mask.
Definition: xv_hdmitx1_hw.h:197
XV_HDMITX1_PIO_OUT_SET_OFFSET
#define XV_HDMITX1_PIO_OUT_SET_OFFSET
PIO Out Register Set * offset.
Definition: xv_hdmitx1_hw.h:150

This macro sets the mode bit.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_SetMode(XV_HdmiTx1 *InstancePtr)

Referenced by XV_HdmiTx1_SetHdmiFrlMode(), and XV_HdmiTx1_SetHdmiTmdsMode().

#define XV_HdmiTx1_SetScrambler | ( |  | InstancePtr,
|  |  | SetClr
| ) |  |

Value:
{ \
if (SetClr) { \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_PIO_OUT_SET_OFFSET), \
(XV_HDMITX1_PIO_OUT_SCRM_MASK)); \
(InstancePtr)->Stream.IsScrambled = (TRUE); \
} \
else { \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_PIO_OUT_CLR_OFFSET), \
(XV_HDMITX1_PIO_OUT_SCRM_MASK)); \
(InstancePtr)->Stream.IsScrambled = (FALSE); \
} \
}
XV_HDMITX1_PIO_OUT_CLR_OFFSET
#define XV_HDMITX1_PIO_OUT_CLR_OFFSET
PIO Out Register Clear * offset.
Definition: xv_hdmitx1_hw.h:153
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_PIO_OUT_SCRM_MASK
#define XV_HDMITX1_PIO_OUT_SCRM_MASK
PIO Out Scrambler mask.
Definition: xv_hdmitx1_hw.h:210
XV_HDMITX1_PIO_OUT_SET_OFFSET
#define XV_HDMITX1_PIO_OUT_SET_OFFSET
PIO Out Register Set * offset.
Definition: xv_hdmitx1_hw.h:150

This macro controls the HDMI TX Scrambler.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  SetClr | specifies TRUE/FALSE value to either set ON or clear Scrambler.

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_SetScrambler(XV_HdmiTx1 *InstancePtr, u8 SetClr)

Referenced by XV_HdmiTx1_Scrambler().

#define XV_HdmiTx1_VrrControl | ( |  | InstancePtr,
|  |  | SetClr
| ) |  |

Value:
{ \
if (SetClr) { \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_AUX_CTRL_SET_OFFSET), \
(XV_HDMITX1_AUX_CTRL_VRR_EN_MASK)); \
} \
else { \
XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress, \
(XV_HDMITX1_AUX_CTRL_CLR_OFFSET), \
(XV_HDMITX1_AUX_CTRL_VRR_EN_MASK)); \
} \
}
XV_HdmiTx1_WriteReg
#define XV_HdmiTx1_WriteReg(BaseAddress, RegOffset, Data)
This macro writes a value to a HDMI TX register.
Definition: xv_hdmitx1_hw.h:763
XV_HDMITX1_AUX_CTRL_VRR_EN_MASK
#define XV_HDMITX1_AUX_CTRL_VRR_EN_MASK
AUX Control VRR En mask.
Definition: xv_hdmitx1_hw.h:382
XV_HDMITX1_AUX_CTRL_SET_OFFSET
#define XV_HDMITX1_AUX_CTRL_SET_OFFSET
AUX Control Register Set * offset.
Definition: xv_hdmitx1_hw.h:357
XV_HDMITX1_AUX_CTRL_CLR_OFFSET
#define XV_HDMITX1_AUX_CTRL_CLR_OFFSET
AUX Control Register Clear * offset.
Definition: xv_hdmitx1_hw.h:360

This macro allows enabling/disabling of VRR in HDMI Tx.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  SetClr | specifies TRUE/FALSE value to either enable or disable the VFP Event

Returns
  None.

Note
  C-style signature: void XV_HdmiTx1_VrrControl(XV_HdmiTx1 *InstancePtr, u8 SetClr)

## Typedef Documentation

typedef void(* XV_HdmiTx1_Callback)(void *CallbackRef)

Callback type for Vsync event interrupt.

Parameters

  CallbackRef | is a callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked.

Returns
  None.

Note
  None.

## Enumeration Type Documentation

enum XV_HdmiTx1_HandlerType

These constants specify different types of handler and used to differentiate interrupt requests from peripheral.

## Function Documentation

void XV_HdmiTx1_AudioEnable | ( | XV_HdmiTx1 * | InstancePtr | ) |

This macro enables audio in HDMI TX core.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  None.

References XV_HdmiTx1::Stream, XV_HDMITX1_AUD_CTRL_RUN_MASK, XV_HDMITX1_AUD_CTRL_SET_OFFSET, XV_HdmiTx1_FRLACRStart(), XV_HdmiTx1_TMDSACRStart(), and XV_HdmiTx1_WriteReg.

Referenced by XV_HdmiTx1_SetAudioChannels(), XV_HdmiTx1_SetAudioFormat(), XV_HdmiTx1_SetHdmiFrlMode(), and XV_HdmiTx1_SetHdmiTmdsMode().

void XV_HdmiTx1_Aux_Dsc_Send_Data | ( | XV_HdmiTx1 * | InstancePtr,
|  | u32 | Data
| ) |  |

This function transmits the DSC packet data.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  Data | value to be written

Returns
  None.

Note
  None.

References XV_HdmiTx1_Config::BaseAddress, XV_HdmiTx1::Config, and XV_HdmiTx1_WriteReg.

void XV_HdmiTx1_Aux_Dsc_Send_Header | ( | XV_HdmiTx1 * | InstancePtr,
|  | u32 | Data
| ) |  |

This function transmits the DSC packet header.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  Data | value to be written

Returns
  None.

Note
  None.

References XV_HdmiTx1_Config::BaseAddress, XV_HdmiTx1::Config, and XV_HdmiTx1_WriteReg.

void XV_HdmiTx1_AuxEnable | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function enables the HDMI TX Auxiliary (AUX) peripheral.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  None.

References XV_HDMITX1_AUX_CTRL_RUN_MASK, XV_HDMITX1_AUX_CTRL_SET_OFFSET, and XV_HdmiTx1_WriteReg.

Referenced by XV_HdmiTx1_FrlStreamStart(), XV_HdmiTx1_SetHdmiFrlMode(), and XV_HdmiTx1_SetHdmiTmdsMode().

u32 XV_HdmiTx1_AuxSend | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function transmits the infoframes generated by the processor.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  - XST_SUCCESS if infoframes transmitted successfully.
  - XST_FAILURE if AUX FIFO is full.

Note
  None.

References XV_HdmiTx1::Aux, XV_HdmiTx1_Config::BaseAddress, XV_HdmiTx1::Config, XV_HDMITX1_AUX_DAT_OFFSET, XV_HDMITX1_AUX_STA_FIFO_FUL_MASK, XV_HDMITX1_AUX_STA_OFFSET, XV_HDMITX1_AUX_STA_PKT_RDY_MASK, XV_HdmiTx1_ReadReg, and XV_HdmiTx1_WriteReg.

int XV_HdmiTx1_CfgInitialize | ( | XV_HdmiTx1 * | InstancePtr,
|  | XV_HdmiTx1_Config * | CfgPtr,
|  | UINTPTR | EffectiveAddr
| ) |  |

This function initializes the HDMI TX core.

This function must be called prior to using the HDMI TX core. Initialization of the HDMI TX includes setting up the instance data and ensuring the hardware is in a quiescent state.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  CfgPtr | points to the configuration structure associated with the HDMI TX core.
  EffectiveAddr | is the base address of the device. If address translation is being used, then this parameter must reflect the virtual base address. Otherwise, the physical address should be used.

Returns
  - XST_SUCCESS if XV_HdmiTx1_CfgInitialize was successful.
  - XST_FAILURE if HDMI TX PIO ID mismatched.

Note
  None.

References XV_HdmiTx1_Stream::Audio, XV_HdmiTx1_Config::BaseAddress, XV_HdmiTx1::Config, XV_HdmiTx1::ConnectCallback, XV_HdmiTx1_Stream::CorePixPerClk, XV_HdmiTx1::DscDecodeFailCallback, XV_HdmiTx1::DynHdrMtwCallback, XV_HdmiTx1_Stream::Frl, XV_HdmiTx1::FrlConfigCallback, XV_HdmiTx1::FrlFfeCallback, XV_HdmiTx1::FrlStartCallback, XV_HdmiTx1::FrlStopCallback, XV_HdmiTx1_Stream::IsConnected, XV_HdmiTx1::IsReady, XV_HdmiTx1_Frl::Lanes, XV_HdmiTx1_Frl::MaxFrlRate, XV_HdmiTx1_Config::MaxFrlRate, XV_HdmiTx1_Stream::OverrideScrambler, XV_HdmiTx1_Frl::RateLock, XV_HdmiTx1_Stream::State, XV_HdmiTx1::Stream, XV_HdmiTx1::StreamDownCallback, XV_HdmiTx1::StreamUpCallback, XV_HdmiTx1::TmdsConfigCallback, XV_HdmiTx1::ToggleCallback, XV_HdmiTx1_Frl::TrainingState, XV_HdmiTx1::VsCallback, XV_HDMITX1_AUD_CTRL_CLR_OFFSET, XV_HDMITX1_AUD_CTRL_SET_OFFSET, XV_HdmiTx1_AudioDisable, XV_HdmiTx1_AuxDisable, XV_HdmiTx1_Clear(), XV_HDMITX1_CONNECT_CONF_OFFSET, XV_HdmiTx1_DdcDisable, XV_HdmiTx1_DdcIntrClear, XV_HdmiTx1_FrlExecute(), XV_HdmiTx1_FrlExtVidCkeSource(), XV_HdmiTx1_FrlIntrDisable, XV_HdmiTx1_FrlIntrEnable, XV_HdmiTx1_FrlReset(), XV_HdmiTx1_GetTime1Ms, XV_HDMITX1_HPD_TIMEGRID_OFFSET, XV_HDMITX1_MASK_16, XV_HDMITX1_PIO_ID, XV_HDMITX1_PIO_ID_OFFSET, XV_HDMITX1_PIO_IN_BRDG_LOCKED_MASK, XV_HDMITX1_PIO_IN_BRDG_OVERFLOW_MASK, XV_HDMITX1_PIO_IN_BRDG_UNDERFLOW_MASK, XV_HDMITX1_PIO_IN_EVT_FE_OFFSET, XV_HDMITX1_PIO_IN_EVT_RE_OFFSET, XV_HDMITX1_PIO_IN_HPD_MASK, XV_HDMITX1_PIO_IN_HPD_TOGGLE_MASK, XV_HDMITX1_PIO_IN_LNK_RDY_MASK, XV_HDMITX1_PIO_IN_VS_MASK, XV_HdmiTx1_PioDisable, XV_HdmiTx1_PioIntrClear, XV_HdmiTx1_ReadReg, XV_HdmiTx1_SetHdmiTmdsMode(), XV_HDMITX1_SHIFT_16, XV_HDMITX1_TOGGLE_CONF_OFFSET, and XV_HdmiTx1_WriteReg.

void XV_HdmiTx1_Clear | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function clear the HDMI TX variables and sets it to the defaults.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns

Note
  This is required after a reset or init.

Referenced by XV_HdmiTx1_CfgInitialize().

void XV_HdmiTx1_ClearFrlWrongLtp | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function clears the debugging flag which would have prevented the core from sending out correct LTP.

Parameters

  InstancePtr | is a pointer to the XHdmi_Tx core instance.

Returns
  None.

Note
  None.

References XV_HdmiTx1_Stream::Frl, and XV_HdmiTx1::Stream.

void XV_HdmiTx1_ClearGcpAvmuteBit | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function clears the HDMI TX AUX GCP register AVMUTE bit.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  None.

References XV_HDMITX1_PIO_OUT_CLR_OFFSET, XV_HDMITX1_PIO_OUT_GCP_AVMUTE_MASK, and XV_HdmiTx1_WriteReg.

void XV_HdmiTx1_ClearGcpClearAvmuteBit | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function clears the HDMI TX AUX GCP register CLEAR_AVMUTE bit.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  None.

References XV_HDMITX1_PIO_OUT_CLR_OFFSET, XV_HDMITX1_PIO_OUT_GCP_CLEARAVMUTE_MASK, and XV_HdmiTx1_WriteReg.

int XV_HdmiTx1_ClockRatio | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function controls the TMDS clock ratio.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  - XST_SUCCESS if HDMI 2.0
  - XST_FAILURE if HDMI 1.4

Note
  None.

References XV_HdmiTx1_Stream::ScdcSupport, XV_HdmiTx1::Stream, XV_HdmiTx1_Stream::TMDSClockRatio, XV_HdmiTx1_DdcRead(), and XV_HdmiTx1_DdcWrite().

Referenced by XV_HdmiTx1_SetStream().

void XV_HdmiTx1_DdcInit | ( | XV_HdmiTx1 * | InstancePtr,
|  | u32 | Frequency
| ) |  |

This function prepares TX DDC peripheral to use.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  Frequency | specifies the value that needs to be set.

Returns
  None.

Note
  None.

References XV_HdmiTx1_Config::BaseAddress, XV_HdmiTx1::Config, XV_HDMITX1_DDC_CTRL_CLK_DIV_MASK, XV_HDMITX1_DDC_CTRL_OFFSET, and XV_HdmiTx1_WriteReg.

Referenced by XV_HdmiTx1_SetAxiClkFreq().

int XV_HdmiTx1_DdcRead | ( | XV_HdmiTx1 * | InstancePtr,
|  | u8 | Slave,
|  | u16 | Length,
|  | u8 * | Buffer,
|  | u8 | Stop
| ) |  |

This function reads data from DDC peripheral from given slave address.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  Slave | specifies the slave address from where data needs to be read.
  Length | specifies number of bytes to be read.
  Buffer | specifies a pointer to u8 variable that will be filled with data.
  Stop | specifies the stop flag which is either TRUE/FALSE.

Returns
  - XST_SUCCESS if an acknowledgement received and timeout.
  - XST_FAILURE if no acknowledgement received.

Note
  None.

References XV_HDMITX1_DDC_CMD_RD_TOKEN, XV_HDMITX1_DDC_CMD_STP_TOKEN, XV_HDMITX1_DDC_CMD_STR_TOKEN, XV_HDMITX1_DDC_CMD_WR_TOKEN, XV_HdmiTx1_DdcDisable, XV_HdmiTx1_DdcEnable, XV_HdmiTx1_DdcGetAck(), XV_HdmiTx1_DdcIntrDisable, XV_HdmiTx1_DdcReadData(), XV_HdmiTx1_DdcWaitForDone(), XV_HdmiTx1_DdcWriteCommand(), XV_HdmiTx1_GetFrlTimer(), XV_HdmiTx1_PioIntrDisable, XV_HdmiTx1_PioIntrEnable, and XV_HdmiTx1_SetFrlTimerClockCycles().

Referenced by XV_HdmiTx1_ClockRatio(), XV_HdmiTx1_DdcReadReg(), XV_HdmiTx1_DdcWriteField(), XV_HdmiTx1_Scrambler(), and XV_HdmiTx1_ShowSCDC().

int XV_HdmiTx1_DdcReadReg | ( | XV_HdmiTx1 * | InstancePtr,
|  | u8 | Slave,
|  | u16 | Length,
|  | u8 | RegAddr,
|  | u8 * | Buffer
| ) |  |

This function reads specified register from DDC peripheral from given slave address.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  Slave | specifies the slave address from where data needs to be read.
  Length | specifies number of bytes to be read.
  RegAddr | specifies the register address from where data needs to be read.
  Buffer | specifies a pointer to u8 variable that will be filled with data.
  Stop | specifies the stop flag which is either TRUE/FALSE.

Returns
  - XST_SUCCESS if an acknowledgement received and timeout.
  - XST_FAILURE if no acknowledgement received.

Note
  None.

References XV_HdmiTx1_DdcRead(), and XV_HdmiTx1_DdcWrite().

Referenced by XV_HdmiTx1_GetScdcEdRegisters().

int XV_HdmiTx1_DdcWrite | ( | XV_HdmiTx1 * | InstancePtr,
|  | u8 | Slave,
|  | u16 | Length,
|  | u8 * | Buffer,
|  | u8 | Stop
| ) |  |

This function writes data from DDC peripheral from given slave address.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  Slave | specifies the slave address from where data needs to be read.
  Length | specifies number of bytes to be read.
  Buffer | specifies a pointer to u8 variable that will be filled with data.
  Stop | specifies the stop flag which is either TRUE/FALSE.

Returns
  - XST_SUCCESS if an acknowledgement received and timeout.
  - XST_FAILURE if no acknowledgement received.

Note
  None.

References XV_HDMITX1_DDC_CMD_STP_TOKEN, XV_HDMITX1_DDC_CMD_STR_TOKEN, XV_HDMITX1_DDC_CMD_WR_TOKEN, XV_HdmiTx1_DdcDisable, XV_HdmiTx1_DdcEnable, XV_HdmiTx1_DdcGetAck(), XV_HdmiTx1_DdcIntrDisable, XV_HdmiTx1_DdcWaitForDone(), XV_HdmiTx1_DdcWriteCommand(), XV_HdmiTx1_GetFrlTimer(), XV_HdmiTx1_PioIntrDisable, XV_HdmiTx1_PioIntrEnable, and XV_HdmiTx1_SetFrlTimerClockCycles().

Referenced by XV_HdmiTx1_ClockRatio(), XV_HdmiTx1_DdcReadReg(), XV_HdmiTx1_DdcWriteField(), XV_HdmiTx1_DetectHdmi20(), XV_HdmiTx1_Scrambler(), and XV_HdmiTx1_ShowSCDC().

int XV_HdmiTx1_DdcWriteField | ( | XV_HdmiTx1 * | InstancePtr,
|  | XV_HdmiTx1_ScdcFieldType | Field,
|  | u8 | Value
| ) |  |

This function writes the specified SCDC Field.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  Field | specifies the fields from SCDC channels to be written
  Value | specifies the values to be written

Returns
  - XST_SUCCESS
  - XST_FAILURE

Note
  None.

References XV_HdmiTx1_ScdcField::Mask, XV_HdmiTx1_ScdcField::Offset, XV_HdmiTx1_ScdcField::Shift, XV_HdmiTx1_DdcRead(), and XV_HdmiTx1_DdcWrite().

Referenced by XV_HdmiTx1_FrlRate(), and XV_HdmiTx1_FrlTrainingInit().

void XV_HdmiTx1_DebugInfo | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function prints debug information on STDIO/UART console.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  None.

References XV_HdmiTx1_Config::BaseAddress, XV_HdmiTx1::Config, XV_HDMITX1_ANLZ_HBP_HS_HPB_SZ_MASK, XV_HDMITX1_ANLZ_HBP_HS_HPB_SZ_SHIFT, XV_HDMITX1_ANLZ_HBP_HS_HS_SZ_MASK, XV_HDMITX1_ANLZ_HBP_HS_OFFSET, XV_HDMITX1_ANLZ_LN_ACT_ACT_SZ_MASK, XV_HDMITX1_ANLZ_LN_ACT_LN_SZ_MASK, XV_HDMITX1_ANLZ_LN_ACT_LN_SZ_SHIFT, XV_HDMITX1_ANLZ_LN_ACT_OFFSET, XV_HDMITX1_DBG_STS_OFFSET, XV_HDMITX1_FRL_CTRL_LN_OP_MASK, XV_HDMITX1_FRL_CTRL_OFFSET, XV_HDMITX1_FRL_CTRL_OP_MODE_MASK, XV_HDMITX1_FRL_LNK_CLK_OFFSET, XV_HDMITX1_FRL_STA_LNK_CLK_OOS_MASK, XV_HDMITX1_FRL_STA_OFFSET, XV_HDMITX1_FRL_VCKE_EXT_MASK, XV_HDMITX1_FRL_VID_CLK_OFFSET, XV_HDMITX1_PIO_IN_BRDG_LOCKED_MASK, XV_HDMITX1_PIO_IN_OFFSET, XV_HDMITX1_PIO_OUT_MODE_MASK, XV_HDMITX1_PIO_OUT_OFFSET, XV_HdmiTx1_ReadReg, XV_HDMITX1_VCKE_SYS_CNT_OFFSET, XV_HDMITX1_VER_ID_OFFSET, and XV_HDMITX1_VER_VERSION_OFFSET.

int XV_HdmiTx1_DetectHdmi20 | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function detects connected sink is a HDMI 2.0/HDMI 1.4 sink device and sets appropriate flag in the TX stream.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  - XST_SUCCESS if HDMI 2.0
  - XST_FAILURE if HDMI 1.4

Note
  None.

References XV_HdmiTx1_Stream::ScdcSupport, XV_HdmiTx1::Stream, and XV_HdmiTx1_DdcWrite().

int XV_HdmiTx1_ExecFrlState | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function executes the different of states of FRL.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns

Note
  None.

References XV_HdmiTx1_Stream::Frl, XV_HdmiTx1::Stream, and XV_HdmiTx1_Frl::TrainingState.

Referenced by XV_HdmiTx1_StartFrlTraining().

void XV_HdmiTx1_EXT_SYSRST | ( | XV_HdmiTx1 * | InstancePtr,
|  | u8 | Reset
| ) |  |

This function asserts or releases the HDMI TX External SYSRST.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  Reset | specifies TRUE/FALSE value to either assert or release HDMI TX External SYSRST.

Returns
  None.

Note
  The reset output of the PIO is inverted. When the system is in reset, the PIO output is cleared and this will reset the HDMI TX. Therefore, clearing the PIO reset output will assert the HDMI External system reset. C-style signature: void XV_HdmiTx1_EXT_SYSRST(XV_HdmiTx1 *InstancePtr, u8 Reset)

References XV_HDMITX1_PIO_OUT_CLR_OFFSET, XV_HDMITX1_PIO_OUT_EXT_SYSRST_MASK, XV_HDMITX1_PIO_OUT_SET_OFFSET, and XV_HdmiTx1_WriteReg.

void XV_HdmiTx1_EXT_VRST | ( | XV_HdmiTx1 * | InstancePtr,
|  | u8 | Reset
| ) |  |

This function asserts or releases the HDMI TX External VRST.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  Reset | specifies TRUE/FALSE value to either assert or release HDMI TX External VRST.

Returns
  None.

Note
  The reset output of the PIO is inverted. When the system is in reset, the PIO output is cleared and this will reset the HDMI TX. Therefore, clearing the PIO reset output will assert the HDMI external video reset. C-style signature: void XV_HdmiTx1_EXT_VRST(XV_HdmiTx1 *InstancePtr, u8 Reset)

References XV_HDMITX1_PIO_OUT_CLR_OFFSET, XV_HDMITX1_PIO_OUT_EXT_VRST_MASK, XV_HDMITX1_PIO_OUT_SET_OFFSET, and XV_HdmiTx1_WriteReg.

void XV_HdmiTx1_FRLACRStart | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function Starts the internal ACR module for FRL.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  Active audio format of HDMI Tx

Note
  None.

References XV_HdmiTx1_Stream::Audio, XV_HdmiTx1_Stream::Frl, XV_HdmiTx1_Frl::LineRate, XV_HdmiTx1::Stream, XV_HDMITX1_AUD_ACR_N_OFFSET, XV_HDMITX1_AUD_CTRL_CLR_OFFSET, XV_HDMITX1_AUD_CTRL_SET_OFFSET, and XV_HdmiTx1_WriteReg.

Referenced by XV_HdmiTx1_AudioEnable().

void XV_HdmiTx1_FrlExecute | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function executes the FRL register updates.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns

Note
  None.

References XV_HDMITX1_FRL_CTRL_EXEC_MASK, XV_HDMITX1_FRL_CTRL_SET_OFFSET, and XV_HdmiTx1_WriteReg.

Referenced by XV_HdmiTx1_CfgInitialize().

void XV_HdmiTx1_FrlExtVidCkeSource | ( | XV_HdmiTx1 * | InstancePtr,
|  | u8 | Value
| ) |  |

This function sets the source of the video clock enable.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  Value | specifies the number of FRL lanes in operation. FALSE = Internally generated video cke

- TRUE = External video cke

Returns

Note
  None.

References XV_HDMITX1_FRL_CTRL_CLR_OFFSET, XV_HDMITX1_FRL_CTRL_SET_OFFSET, XV_HDMITX1_FRL_VCKE_EXT_MASK, and XV_HdmiTx1_WriteReg.

Referenced by XV_HdmiTx1_CfgInitialize().

void XV_HdmiTx1_FrlModeEn | ( | XV_HdmiTx1 * | InstancePtr,
|  | u8 | Enable
| ) |  |

This function sets the FRL operation mode.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  Enable | specifies the FRL mode. FALSE = TMDS

- TRUE = FRL

Returns

Note
  None.

References XV_HDMITX1_FRL_CTRL_CLR_OFFSET, XV_HDMITX1_FRL_CTRL_OP_MODE_MASK, XV_HDMITX1_FRL_CTRL_SET_OFFSET, and XV_HdmiTx1_WriteReg.

Referenced by XV_HdmiTx1_FrlTrainingInit().

int XV_HdmiTx1_FrlRate | ( | XV_HdmiTx1 * | InstancePtr,
|  | u8 | FrlRate
| ) |  |

This function sets the TX core's FRL Rate and sends encoded FRL_Rate data and FFE Levels to the sink through SCDC.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  MaxFrlRate | specifies maximum rates supported 0 = FRL Not Supported 1 = 3 Lanes 3Gbps 2 = 4 Lanes 3Gbps

- 3 = 4 Lanes 6Gbsp
- 4 = 4 Lanes 8Gbps
- 5 = 4 Lanes 10Gbps
- 6 = 4 Lanes 12Gbps

Returns

Note
  None.

References XV_HdmiTx1_Frl::FfeLevels, XV_HdmiTx1_Stream::Frl, XV_HdmiTx1_Frl::FrlRate, XV_HdmiTx1_Frl::Lanes, XV_HdmiTx1_Frl::LineRate, XV_HdmiTx1_Stream::ScdcSupport, XV_HdmiTx1::Stream, XV_HdmiTx1_DdcWriteField(), and XV_HdmiTx1_SetFrlLanes().

Referenced by XV_HdmiTx1_FrlTrainingInit().

void XV_HdmiTx1_FrlReset | ( | XV_HdmiTx1 * | InstancePtr,
|  | u8 | Reset
| ) |  |

This function resets the FRL peripheral.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  Reset | specifies if the FRL peripheral is under reset or not. 0 = Reset released

- 1 = Reset asserted

Returns

Note
  None.

References XV_HDMITX1_FRL_CTRL_CLR_OFFSET, XV_HDMITX1_FRL_CTRL_RSTN_MASK, XV_HDMITX1_FRL_CTRL_SET_OFFSET, and XV_HdmiTx1_WriteReg.

Referenced by XV_HdmiTx1_CfgInitialize().

int XV_HdmiTx1_FrlStreamStart | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function starts FRL video stream.

This should be called after the bridge, video, audio are all active.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns

Note
  None.

References XV_HdmiTx1_Stream::State, XV_HdmiTx1::Stream, XV_HdmiTx1::StreamUpCallback, XV_HdmiTx1::StreamUpRef, XV_HdmiTx1_AuxEnable(), XV_HdmiTx1_AuxIntrEnable, XV_HdmiTx1_DynHdr_DM_Enable, and XV_HdmiTx1_SetFrlActive().

int XV_HdmiTx1_FrlStreamStop | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function stops FRL video stream.

This should be called after the bridge, video, audio are all active.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns

Note
  None.

References XV_HdmiTx1_Stream::State, XV_HdmiTx1::Stream, XV_HdmiTx1::StreamDownCallback, XV_HdmiTx1::StreamDownRef, XV_HdmiTx1_AuxDisable, XV_HdmiTx1_AuxIntrDisable, and XV_HdmiTx1_DynHdr_DM_Disable.

int XV_HdmiTx1_FrlTrainingInit | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function initializes FRL peripheral and sink's SCDC for FRL Training.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns

Note
  None.

References XV_HdmiTx1_Stream::Frl, XV_HdmiTx1_Frl::FrlRate, XV_HdmiTx1::Stream, XV_HdmiTx1_DdcWriteField(), XV_HdmiTx1_FrlModeEn(), XV_HdmiTx1_FrlRate(), and XV_HdmiTx1_SetFrlActive().

XV_HdmiTx1_AudioFormatType XV_HdmiTx1_GetAudioFormat | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function gets the active audio format.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  Active audio format of HDMI Tx

Note
  None.

References XV_HDMITX1_AUD_CTRL_3DAUDFMT_MASK, XV_HDMITX1_AUD_CTRL_AUDFMT_MASK, XV_HDMITX1_AUD_CTRL_AUDFMT_SHIFT, XV_HDMITX1_AUD_CTRL_OFFSET, and XV_HdmiTx1_ReadReg.

u32 XV_HdmiTx1_GetFrlTimer | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function returns the remaining value of the timer of TX Core's FRL peripheral.

Parameters

  InstancePtr | is a pointer to the XHdmi_Tx core instance.

Returns
  Remaining value of the timer in clock cycles.

Note
  None.

References XV_HDMITX1_FRL_TMR_OFFSET, and XV_HdmiTx1_ReadReg.

Referenced by XV_HdmiTx1_DdcRead(), and XV_HdmiTx1_DdcWrite().

u8* XV_HdmiTx1_GetScdcEdRegisters | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function reads the CED and RSED registers from the sink and returns the pointer to the data structure which stores the CED related readings (from SCDC register 0x50 to 0x5A).

Parameters

  InstancePtr | is a pointer to the XHdmi_Tx core instance.

Returns
  None.

Note
  Reading the SCDC registers will clear the values at the sink

References XV_HdmiTx1_Stream::ScdcEd, XV_HdmiTx1::Stream, and XV_HdmiTx1_DdcReadReg().

u64 XV_HdmiTx1_GetTmdsClk | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function sets and return the TMDS Clock based on Video Parameter from the InstancePtr.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  - TMDS Clock

Note
  None.

References XV_HdmiTx1_Stream::PixelClk, XV_HdmiTx1::Stream, and XV_HdmiTx1_Stream::Video.

Referenced by XV_HdmiTx1_SetStream().

void XV_HdmiTx1_Info | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function prints stream and timing information on STDIO/Uart console.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  None.

References XV_HdmiTx1::Stream, and XV_HdmiTx1_Stream::Video.

void XV_HdmiTx1_INT_LRST | ( | XV_HdmiTx1 * | InstancePtr,
|  | u8 | Reset
| ) |  |

This function asserts or releases the HDMI TX Internal LRST.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  Reset | specifies TRUE/FALSE value to either assert or release HDMI TX Internal LRST.

Returns
  None.

Note
  The reset output of the PIO is inverted. When the system is in reset, the PIO output is cleared and this will reset the HDMI TX. Therefore, clearing the PIO reset output will assert the HDMI Internal link reset. C-style signature: void XV_HdmiTx1_INT_VRST(XV_HdmiTx1 *InstancePtr, u8 Reset)

References XV_HDMITX1_PIO_OUT_CLR_OFFSET, XV_HDMITX1_PIO_OUT_INT_LRST_MASK, XV_HDMITX1_PIO_OUT_SET_OFFSET, and XV_HdmiTx1_WriteReg.

void XV_HdmiTx1_INT_VRST | ( | XV_HdmiTx1 * | InstancePtr,
|  | u8 | Reset
| ) |  |

This function asserts or releases the HDMI TX Internal VRST.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  Reset | specifies TRUE/FALSE value to either assert or release HDMI TX Internal VRST.

Returns
  None.

Note
  The reset output of the PIO is inverted. When the system is in reset, the PIO output is cleared and this will reset the HDMI TX. Therefore, clearing the PIO reset output will assert the HDMI Internal video reset. C-style signature: void XV_HdmiTx1_INT_VRST(XV_HdmiTx1 *InstancePtr, u8 Reset)

References XV_HDMITX1_PIO_OUT_CLR_OFFSET, XV_HDMITX1_PIO_OUT_INT_VRST_MASK, XV_HDMITX1_PIO_OUT_SET_OFFSET, and XV_HdmiTx1_WriteReg.

void XV_HdmiTx1_IntrHandler | ( | void * | InstancePtr | ) |

This function is the interrupt handler for the HDMI TX driver.

This handler reads the pending interrupt from PIO and DDC peripheral, determines the source of the interrupts, clears the interrupts and calls callbacks accordingly.

The application is responsible for connecting this function to the interrupt system. Application beyond this driver is also responsible for providing callbacks to handle interrupts and installing the callbacks using XV_HdmiTx1_SetCallback() during initialization phase. An example delivered with this driver demonstrates how this could be done.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 instance that just interrupted.

Returns
  None.

Note
  None.

References XV_HdmiTx1_Config::BaseAddress, XV_HdmiTx1::Config, XV_HdmiTx1::IsReady, XV_HDMITX1_AUX_STA_IRQ_MASK, XV_HDMITX1_AUX_STA_OFFSET, XV_HDMITX1_DDC_STA_IRQ_MASK, XV_HDMITX1_DDC_STA_OFFSET, XV_HDMITX1_FRL_STA_IRQ_MASK, XV_HDMITX1_FRL_STA_OFFSET, XV_HDMITX1_PIO_STA_IRQ_MASK, XV_HDMITX1_PIO_STA_OFFSET, and XV_HdmiTx1_ReadReg.

int XV_HdmiTx1_IsStreamConnected | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function provides the stream connected status.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  - TRUE = Stream is connected.
  - FALSE = Stream is connected.

Note
  None.

References XV_HdmiTx1_Stream::IsConnected, and XV_HdmiTx1::Stream.

int XV_HdmiTx1_IsStreamScrambled | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function provides status of the stream.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  - TRUE = Scrambled.
  - FALSE = Not scrambled.

Note
  None.

References XV_HdmiTx1_Stream::IsScrambled, and XV_HdmiTx1::Stream.

XV_HdmiTx1_Config* XV_HdmiTx1_LookupConfig | ( | u16 | DeviceId | ) |

This function returns a reference to an XV_HdmiTx1_Config structure based on the core id, DeviceId.

The return value will refer to an entry in the device configuration table defined in the xv_hdmitx1_g.c file.

Parameters

  DeviceId | is the unique core ID of the HDMI TX core for the lookup operation.

Returns
  XV_HdmiTx1_LookupConfig returns a reference to a config record in the configuration table (in xv_hdmitx1_g.c) corresponding to DeviceId, or NULL if no match is found.

Note
  None.

u8 XV_HdmiTx1_LookupVic | ( | XVidC_VideoMode | VideoMode | ) |

This function provides video identification code of video mode.

Parameters

  VideoMode | specifies resolution identifier.

Returns
  Video identification code defined in the VIC table.

Note
  None.

void XV_HdmiTx1_RegisterDebug | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function prints out HDMI TX register.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  None.

References XV_HdmiTx1_Config::BaseAddress, XV_HdmiTx1::Config, XV_HDMITX1_FRL_FEC_ERR_INJ_OFFSET, and XV_HdmiTx1_ReadReg.

int XV_HdmiTx1_Scrambler | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function controls the scrambler.

Requires TMDSClock to be up to date in order to force enable scrambler when TMDSClock > 340MHz.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  - XST_SUCCESS if HDMI 2.0
  - XST_FAILURE if HDMI 1.4

Note
  None.

References XV_HdmiTx1_Stream::IsScrambled, XV_HdmiTx1_Stream::OverrideScrambler, XV_HdmiTx1_Stream::ScdcSupport, XV_HdmiTx1::Stream, XV_HdmiTx1_Stream::TMDSClock, XV_HdmiTx1_DdcRead(), XV_HdmiTx1_DdcWrite(), and XV_HdmiTx1_SetScrambler.

Referenced by XV_HdmiTx1_SetStream().

int XV_HdmiTx1_SelfTest | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function reads ID of HDMI TX PIO peripheral.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  - XST_SUCCESS if PIO ID was matched.
  - XST_FAILURE if PIO ID was mismatched.

Note
  None.

References XV_HdmiTx1_Config::BaseAddress, XV_HdmiTx1::Config, XV_HDMITX1_MASK_16, XV_HDMITX1_PIO_ID, XV_HDMITX1_PIO_ID_OFFSET, XV_HdmiTx1_ReadReg, and XV_HDMITX1_SHIFT_16.

int XV_HdmiTx1_SetAudioChannels | ( | XV_HdmiTx1 * | InstancePtr,
|  | u8 | Value
| ) |  |

This function sets the active audio channels.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  - XST_SUCCESS if active channels were set.
  - XST_FAILURE if no active channles were set.

Note
  None.

References XV_HDMITX1_3DAUD_CTRL_CH_MASK, XV_HDMITX1_3DAUD_CTRL_CH_SHIFT, XV_HDMITX1_AUD_CTRL_CH_MASK, XV_HDMITX1_AUD_CTRL_CH_SHIFT, XV_HDMITX1_AUD_CTRL_CLR_OFFSET, XV_HDMITX1_AUD_CTRL_OFFSET, XV_HDMITX1_AUD_CTRL_RUN_MASK, XV_HDMITX1_AUD_CTRL_SET_OFFSET, XV_HdmiTx1_AudioEnable(), XV_HdmiTx1_ReadReg, and XV_HdmiTx1_WriteReg.

int XV_HdmiTx1_SetAudioFormat | ( | XV_HdmiTx1 * | InstancePtr,
|  | XV_HdmiTx1_AudioFormatType | Value
| ) |  |

This function sets the active audio format.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  - XST_SUCCESS if active channels were set.
  - XST_FAILURE if no active channles were set.

Note
  None.

References XV_HDMITX1_AUD_CTRL_3DAUDFMT_EN, XV_HDMITX1_AUD_CTRL_3DAUDFMT_MASK, XV_HDMITX1_AUD_CTRL_AUDFMT_MASK, XV_HDMITX1_AUD_CTRL_CLR_OFFSET, XV_HDMITX1_AUD_CTRL_OFFSET, XV_HDMITX1_AUD_CTRL_RUN_MASK, XV_HDMITX1_AUD_CTRL_SET_OFFSET, XV_HdmiTx1_AudioEnable(), XV_HdmiTx1_ReadReg, and XV_HdmiTx1_WriteReg.

void XV_HdmiTx1_SetAxiClkFreq | ( | XV_HdmiTx1 * | InstancePtr,
|  | u32 | ClkFreq
| ) |  |

This function sets the AXI4-Lite Clock Frequency.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  ClkFreq | specifies the value that needs to be set.

Returns

Note
  This is required after a reset or init.

References XV_HdmiTx1::Config, XV_HdmiTx1::CpuClkFreq, and XV_HdmiTx1_DdcInit().

int XV_HdmiTx1_SetCallback | ( | XV_HdmiTx1 * | InstancePtr,
|  | XV_HdmiTx1_HandlerType | HandlerType,
|  | void * | CallbackFunc,
|  | void * | CallbackRef
| ) |  |

This function installs an asynchronous callback function for the given HandlerType:

    HandlerType              Callback Function Type
    -----------------------  --------------------------------------------------
    (XV_HDMITX1_HANDLER_HPD)   HpdCallback
    (XV_HDMITX1_HANDLER_VS)    VsCallback

Parameters

  InstancePtr | is a pointer to the HDMI TX core instance.
  HandlerType | specifies the type of handler.
  CallbackFunc | is the address of the callback function.
  CallbackRef | is a user data item that will be passed to the callback function when it is invoked.

Returns
  - XST_SUCCESS if callback function installed successfully.
  - XST_INVALID_PARAM when HandlerType is invalid.

Note
  Invoking this function for a handler that already has been installed replaces it with the new handler.

References XV_HdmiTx1::BrdgLockedCallback, XV_HdmiTx1::BrdgLockedRef, XV_HdmiTx1::BrdgOverflowCallback, XV_HdmiTx1::BrdgOverflowRef, XV_HdmiTx1::BrdgUnderflowCallback, XV_HdmiTx1::BrdgUnderflowRef, XV_HdmiTx1::BrdgUnlockedCallback, XV_HdmiTx1::BrdgUnlockedRef, XV_HdmiTx1::CedUpdateCallback, XV_HdmiTx1::CedUpdateRef, XV_HdmiTx1::ConnectCallback, XV_HdmiTx1::ConnectRef, XV_HdmiTx1::DscDecodeFailCallback, XV_HdmiTx1::DscDecodeFailRef, XV_HdmiTx1::DynHdrMtwCallback, XV_HdmiTx1::DynHdrMtwRef, XV_HdmiTx1::FrlConfigCallback, XV_HdmiTx1::FrlConfigRef, XV_HdmiTx1::FrlFfeCallback, XV_HdmiTx1::FrlFfeRef, XV_HdmiTx1::FrlLts1Callback, XV_HdmiTx1::FrlLts1Ref, XV_HdmiTx1::FrlLts2Callback, XV_HdmiTx1::FrlLts2Ref, XV_HdmiTx1::FrlLts3Callback, XV_HdmiTx1::FrlLts3Ref, XV_HdmiTx1::FrlLts4Callback, XV_HdmiTx1::FrlLts4Ref, XV_HdmiTx1::FrlLtsLCallback, XV_HdmiTx1::FrlLtsLRef, XV_HdmiTx1::FrlLtsPCallback, XV_HdmiTx1::FrlLtsPRef, XV_HdmiTx1::FrlStartCallback, XV_HdmiTx1::FrlStartRef, XV_HdmiTx1::FrlStopCallback, XV_HdmiTx1::FrlStopRef, XV_HdmiTx1::StreamDownCallback, XV_HdmiTx1::StreamDownRef, XV_HdmiTx1::StreamUpCallback, XV_HdmiTx1::StreamUpRef, XV_HdmiTx1::TmdsConfigCallback, XV_HdmiTx1::TmdsConfigRef, XV_HdmiTx1::ToggleCallback, XV_HdmiTx1::ToggleRef, XV_HdmiTx1::VsCallback, and XV_HdmiTx1::VsRef.

void XV_HdmiTx1_SetColorDepth | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function sets the color depth.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  None.

References XV_HdmiTx1_Config::BaseAddress, XV_HdmiTx1::Config, XV_HdmiTx1::Stream, XV_HdmiTx1_Stream::Video, XV_HDMITX1_PIO_OUT_COLOR_DEPTH_MASK, XV_HDMITX1_PIO_OUT_COLOR_DEPTH_SHIFT, XV_HDMITX1_PIO_OUT_MSK_OFFSET, XV_HDMITX1_PIO_OUT_OFFSET, and XV_HdmiTx1_WriteReg.

Referenced by XV_HdmiTx1_SetStream().

void XV_HdmiTx1_SetColorFormat | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function sets the color format.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  None.

References XV_HdmiTx1_Config::BaseAddress, XV_HdmiTx1::Config, XV_HdmiTx1::Stream, XV_HdmiTx1_Stream::Video, XV_HDMITX1_PIO_OUT_COLOR_SPACE_MASK, XV_HDMITX1_PIO_OUT_COLOR_SPACE_SHIFT, XV_HDMITX1_PIO_OUT_MSK_OFFSET, XV_HDMITX1_PIO_OUT_OFFSET, and XV_HdmiTx1_WriteReg.

Referenced by XV_HdmiTx1_SetStream().

void XV_HdmiTx1_SetDviMode | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function sets the core into DVI mode.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns

Note
  This is required after a reset or init.

References XV_HdmiTx1::Stream, XV_HdmiTx1_AudioDisable, XV_HdmiTx1_AuxDisable, and XV_HdmiTx1_ClearMode.

void XV_HdmiTx1_SetFrl10MicroSecondsTimer | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function sets the timer of TX Core's FRL peripheral for 10 Microseconds.

Parameters

  InstancePtr | is a pointer to the XHdmi_Tx core instance.
  None. |

Returns
  None.

Note
  None.

References XV_HdmiTx1::Config, XV_HDMITX1_FRL_TMR_OFFSET, and XV_HdmiTx1_WriteReg.

Referenced by XV_HdmiTx1_StartTmdsMode().

void XV_HdmiTx1_SetFrlActive | ( | XV_HdmiTx1 * | InstancePtr,
|  | XV_HdmiTx1_FrlActiveMode | Mode
| ) |  |

This function sets active FRL mode.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  Mode | specifies the active FRL mode. 0 = FRL transmission only includes GAP characters

- 1 = FRL transmission includes video, audio and control packets

Returns

Note
  None.

References XV_HDMITX1_FRL_ACT_MASK, XV_HDMITX1_FRL_CTRL_CLR_OFFSET, XV_HDMITX1_FRL_CTRL_SET_OFFSET, and XV_HdmiTx1_WriteReg.

Referenced by XV_HdmiTx1_FrlStreamStart(), and XV_HdmiTx1_FrlTrainingInit().

void XV_HdmiTx1_SetFrlLanes | ( | XV_HdmiTx1 * | InstancePtr,
|  | u8 | Lanes
| ) |  |

This function sets the number of FRL lane in operations.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  Lanes | specifies the number of FRL lanes in operation. 3 = 3 FRL lanes

- 4 = 4 FRL lanes

Returns

Note
  None.

References XV_HDMITX1_FRL_CTRL_CLR_OFFSET, XV_HDMITX1_FRL_CTRL_LN_OP_MASK, XV_HDMITX1_FRL_CTRL_SET_OFFSET, and XV_HdmiTx1_WriteReg.

Referenced by XV_HdmiTx1_FrlRate().

void XV_HdmiTx1_SetFrlLtp | ( | XV_HdmiTx1 * | InstancePtr,
|  | u8 | Lane,
|  | XV_HdmiTx1_FrlLtpType | Ltp
| ) |  |

This function sets the link training pattern for the selected lane.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  Lane | specifies the lane of which the Link Training Pattern will be set.
  Ltp | specifies Link Training Pattern 0 = No LTP

- 1 = LTP1 / ALL 1's pattern
- 2 = LTP2 / All 0's pattern
- 3 = LTP3 / Nyquist clock pattern
- 4 = LTP4 / Source TxDDE compliance test pattern
- 5 = LTP5 / LFSR 0
- 6 = LTP6 / LFSR 1
- 7 = LTP7 / LFSR 2
- 8 = LTP8 / LFSR 3

Returns

Note
  None.

References XV_HDMITX1_FRL_CTRL_OFFSET, XV_HDMITX1_FRL_LTP0_REQ_MASK, XV_HDMITX1_FRL_LTP0_REQ_SHIFT, XV_HDMITX1_FRL_LTP1_REQ_SHIFT, XV_HDMITX1_FRL_LTP2_REQ_SHIFT, XV_HDMITX1_FRL_LTP3_REQ_SHIFT, XV_HdmiTx1_ReadReg, and XV_HdmiTx1_WriteReg.

void XV_HdmiTx1_SetFrlMaxFrlRate | ( | XV_HdmiTx1 * | InstancePtr,
|  | XHdmiC_MaxFrlRate | MaxFrlRate
| ) |  |

This function sets maximum FRL Rate supported by the system.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  MaxFrlRate | specifies maximum rates supported 0 = FRL Not Supported 1 = 3 Lanes 3Gbps 2 = 4 Lanes 3Gbps

- 3 = 4 Lanes 6Gbsp
- 4 = 4 Lanes 8Gbps
- 5 = 4 Lanes 10Gbps
- 6 = 4 Lanes 12Gbps

Returns
  None.

Note
  None.

References XV_HdmiTx1::Config, XV_HdmiTx1_Stream::Frl, XV_HdmiTx1_Frl::MaxFrlRate, XV_HdmiTx1_Config::MaxFrlRate, and XV_HdmiTx1::Stream.

void XV_HdmiTx1_SetFrlTimer | ( | XV_HdmiTx1 * | InstancePtr,
|  | u32 | Milliseconds
| ) |  |

This function sets the timer of TX Core's FRL peripheral.

Parameters

  InstancePtr | is a pointer to the XHdmi_Tx core instance.
  Value | specifies the timer's frequency (in milliseconds)

Returns
  None.

Note
  None.

References XV_HdmiTx1::Config, XV_HDMITX1_FRL_TMR_OFFSET, and XV_HdmiTx1_WriteReg.

void XV_HdmiTx1_SetFrlTimerClockCycles | ( | XV_HdmiTx1 * | InstancePtr,
|  | u32 | ClockCycles
| ) |  |

This function sets the timer of TX Core's FRL peripheral in clock cycles.

Parameters

  InstancePtr | is a pointer to the XHdmi_Tx core instance.
  ClockCycles | specifies the timer's frequency (in clock cycles)

Returns
  Remaining value of the timer in clock cycles.

Note
  None.

References XV_HDMITX1_FRL_TMR_OFFSET, and XV_HdmiTx1_WriteReg.

Referenced by XV_HdmiTx1_DdcRead(), and XV_HdmiTx1_DdcWrite().

void XV_HdmiTx1_SetFrlWrongLtp | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function sets the core to send out wrong LTP on one of the channel to prevent link training from passing.

Parameters

  InstancePtr | is a pointer to the XHdmi_Tx core instance.

Returns
  None.

Note
  None.

References XV_HdmiTx1_Stream::Frl, and XV_HdmiTx1::Stream.

void XV_HdmiTx1_SetGcpAvmuteBit | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function sets the HDMI TX AUX GCP register AVMUTE bit.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  None.

References XV_HDMITX1_PIO_OUT_GCP_AVMUTE_MASK, XV_HDMITX1_PIO_OUT_SET_OFFSET, and XV_HdmiTx1_WriteReg.

void XV_HdmiTx1_SetGcpClearAvmuteBit | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function sets the HDMI TX AUX GCP register CLEAR_AVMUTE bit.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  None.

References XV_HDMITX1_PIO_OUT_GCP_CLEARAVMUTE_MASK, XV_HDMITX1_PIO_OUT_SET_OFFSET, and XV_HdmiTx1_WriteReg.

void XV_HdmiTx1_SetHdmiFrlMode | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function sets the core into HDMI FRL mode.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns

Note
  This is required after a reset or init.

References XV_HdmiTx1::Stream, XV_HdmiTx1_AudioEnable(), XV_HdmiTx1_AuxEnable(), and XV_HdmiTx1_SetMode.

void XV_HdmiTx1_SetHdmiTmdsMode | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function sets the core into HDMI TMDS mode.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns

Note
  This is required after a reset or init.

References XV_HdmiTx1::Stream, XV_HdmiTx1_AudioEnable(), XV_HdmiTx1_AuxEnable(), and XV_HdmiTx1_SetMode.

Referenced by XV_HdmiTx1_CfgInitialize().

void XV_HdmiTx1_SetPixelRate | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function sets the pixel rate at output.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  None.

References XV_HdmiTx1_Config::BaseAddress, XV_HdmiTx1::Config, XV_HdmiTx1_Stream::CorePixPerClk, XV_HdmiTx1::Stream, XV_HDMITX1_PIO_OUT_MSK_OFFSET, XV_HDMITX1_PIO_OUT_OFFSET, XV_HDMITX1_PIO_OUT_PIXEL_RATE_MASK, XV_HDMITX1_PIO_OUT_PIXEL_RATE_SHIFT, and XV_HdmiTx1_WriteReg.

Referenced by XV_HdmiTx1_SetStream().

void XV_HdmiTx1_SetSampleRate | ( | XV_HdmiTx1 * | InstancePtr,
|  | u8 | SampleRate
| ) |  |

This function sets the sample rate at output.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  SampleRate | specifies the value that needs to be set. 2 samples per clock 3 samples per clock. 5 samples per clock.

Returns
  None.

Note
  None.

References XV_HdmiTx1_Config::BaseAddress, XV_HdmiTx1::Config, XV_HdmiTx1_Stream::SampleRate, XV_HdmiTx1::Stream, XV_HDMITX1_PIO_OUT_MSK_OFFSET, XV_HDMITX1_PIO_OUT_OFFSET, XV_HDMITX1_PIO_OUT_SAMPLE_RATE_MASK, XV_HDMITX1_PIO_OUT_SAMPLE_RATE_SHIFT, and XV_HdmiTx1_WriteReg.

u32 XV_HdmiTx1_SetStream | ( | XV_HdmiTx1 * | InstancePtr,
|  | XVidC_VideoTiming | VideoTiming,
|  | XVidC_FrameRate | FrameRate,
|  | XVidC_ColorFormat | ColorFormat,
|  | XVidC_ColorDepth | Bpc,
|  | XVidC_PixelsPerClock | Ppc,
|  | XVidC_3DInfo * | Info3D,
|  | u8 | FVaFactor,
|  | u8 | VrrEnabled,
|  | u8 | CnmvrrEnabled,
|  | u64 * | TmdsClock
| ) |  |

This function sets the HDMI TX stream parameters.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  VideoTiming | specifies video timing.
  FrameRate | specifies frame rate.
  ColorFormat | specifies the type of color format. 0 = XVIDC_CSF_RGB 1 = XVIDC_CSF_YCRCB_444 2 = XVIDC_CSF_YCRCB_422 3 = XVIDC_CSF_YCRCB_420
  Bpc | specifies the color depth/bits per color component. 6 = XVIDC_BPC_6 8 = XVIDC_BPC_8 10 = XVIDC_BPC_10 12 = XVIDC_BPC_12 16 = XVIDC_BPC_16
  Ppc | specifies the pixel per clock. 4 = XVIDC_PPC_4
  Info3D | 3D info
  FVaFactor | - Fast Video Active Factor
  VrrEnabled | - VRR is enabled or not
  CnmvrrEnabled | - Negative VRR supported flag
  TmdsClock,reference | clock calculated based on the input parameters.

Returns
  XST_SUCCESS on success else XST_FAILURE

Note
  None.

In HDMI the colordepth in YUV422 is always 12 bits, although on the link itself it is being transmitted as 8-bits. Therefore if the colorspace is YUV422, then force the colordepth to 12 bits.

References XV_HdmiTx1_Stream::IsScrambled, XV_HdmiTx1_Stream::ScdcSupport, XV_HdmiTx1::Stream, XV_HdmiTx1_Stream::TMDSClock, XV_HdmiTx1_Stream::TMDSClockRatio, XV_HdmiTx1_Stream::Video, XV_HdmiTx1_ClockRatio(), XV_HdmiTx1_GetTmdsClk(), XV_HdmiTx1_Scrambler(), XV_HdmiTx1_SetColorDepth(), XV_HdmiTx1_SetColorFormat(), and XV_HdmiTx1_SetPixelRate().

void XV_HdmiTx1_ShowSCDC | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function shows the sinks SCDC registers.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  None.

References XV_HdmiTx1_DdcRead(), and XV_HdmiTx1_DdcWrite().

void XV_HdmiTx1_Start | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function starts the HDMI TX core.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

Note
  This is required after a reset or initialization.

References XV_HdmiTx1_PioEnable, and XV_HdmiTx1_PioIntrEnable.

int XV_HdmiTx1_StartFrlTraining | ( | XV_HdmiTx1 * | InstancePtr,
|  | XHdmiC_MaxFrlRate | FrlRate
| ) |  |

This function starts the Fixed Rate Link Training.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.
  FrlRate | specifies the FRL rate to be attempted 0 = FRL Not Supported 1 = 3 Lanes 3Gbps 2 = 4 Lanes 3Gbps

- 3 = 4 Lanes 6Gbsp
- 4 = 4 Lanes 8Gbps
- 5 = 4 Lanes 10Gbps
- 6 = 4 Lanes 12Gbps

Returns
  Status on if FrlTraining can be started or not.

Note
  None.

References XV_HdmiTx1_Stream::Frl, XV_HdmiTx1_Frl::FrlRate, XV_HdmiTx1_Frl::Lanes, XV_HdmiTx1_Frl::LineRate, XV_HdmiTx1_Frl::MaxFrlRate, XV_HdmiTx1::Stream, XV_HdmiTx1_Frl::TrainingState, and XV_HdmiTx1_ExecFrlState().

int XV_HdmiTx1_StartTmdsMode | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function starts the TMDS mode.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  Status on if TMDS can be started or not.

Note
  None.

References XV_HdmiTx1_Stream::Frl, XV_HdmiTx1::Stream, XV_HdmiTx1_Frl::TrainingState, and XV_HdmiTx1_SetFrl10MicroSecondsTimer().

void XV_HdmiTx1_Stop | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function stops the HDMI TX core.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  None.

References XV_HdmiTx1_PioDisable, and XV_HdmiTx1_PioIntrDisable.

void XV_HdmiTx1_TMDSACRStart | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function Starts the internal ACR module for FRL.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTx1 core instance.

Returns
  Active audio format of HDMI Tx

Note
  None.

References XV_HdmiTx1_Stream::Audio, XV_HdmiTx1::Stream, XV_HdmiTx1_Stream::TMDSClock, XV_HDMITX1_AUD_ACR_N_OFFSET, XV_HDMITX1_AUD_CTRL_CLR_OFFSET, XV_HDMITX1_AUD_CTRL_SET_OFFSET, and XV_HdmiTx1_WriteReg.

Referenced by XV_HdmiTx1_AudioEnable().

u32 XV_HdmiTxSs1_GetAudioCtsVal | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function gets the Generated ACR CTS Value.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTxSs1 core instance.

Returns
  Generated ACR CTS Value

Note
  None.

References XV_HDMITX1_AUD_ACR_CTS_OFFSET, and XV_HdmiTx1_ReadReg.

u32 XV_HdmiTxSs1_GetAudioNVal | ( | XV_HdmiTx1 * | InstancePtr | ) |

This function gets the programmed ACR N Value.

Parameters

  InstancePtr | is a pointer to the XV_HdmiTxSs1 core instance.

Returns
  Programmed ACR N Value

Note
  None.

References XV_HDMITX1_AUD_ACR_N_OFFSET, and XV_HdmiTx1_ReadReg.