| devcfg Vitis Drivers API Documentation

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Macros | Functions
xdevcfg_interrupt_example.c File Reference

## Overview

This file contains a interrupt mode design example for the Device Configuration Interface.

This example downloads a given bitstream to the FPGA fabric.

BIT_STREAM_LOCATION specifies the memory location of the bitstream. BIT_STREAM_SIZE_WORDS specifies the size of the bitstream in words. User has to define these correctly for this example to work.

Note
  None

MODIFICATION HISTORY:

      Ver   Who  Date     Changes

      1.00a hvm  02/07/11 First release
      1.00a nm   11/26/11 Holding FPGA in reset before download and
                          releasing it after bitstream download. This code
                          is not checking bitstream download errors.
                          If the bitstream download fails, this test hangs.
      2.00a nm   05/31/12 Updated the notes in the example for CR 660139 to add
                          information that the 2 LSBs of the Source/Destination
                          address when equal to 2�b01 indicate the last DMA command
                          of an overall transfer.
                          Updated the example for CR 660835 so that input length for
                          source/destination to the XDcfg_Transfer APIs is words
                          (32 bit) and not bytes.
      2.01a nm   11/21/12 Fixed CR# 688146. Modified the bitstream address.
      2.02a nm   01/31/13 Fixed CR# 679335.
                          Removed disabling and enabling AXI interface.
                          Clearing the interrupts before the transfer.
                          Added support for partial reconfiguration.
      3.00a kpc  02/10/14 Fixed the compilation error
      3.1   kpc  04/22/14 Fixed CR#780203. Enable the pcap clock if it is not set.
            ms   04/10/17 Modified filename tag to include the file in doxygen
            ms   04/10/17 Modified filename tag to include the file in doxygen
                          examples.
      3.8  Nava  06/21/23 Added support for system device-tree flow.
    *

## Macros
#define | SLCR_LOCK 0xF8000004
| SLCR Write Protection Lock. More...
#define | SLCR_UNLOCK 0xF8000008
| SLCR Write Protection Unlock. More...
#define | SLCR_LVL_SHFTR_EN 0xF8000900
| SLCR Level Shifters Enable. More...
#define | SLCR_PCAP_CLK_CTRL XPAR_PS7_SLCR_0_S_AXI_BASEADDR + 0x168
| SLCR PCAP clock control register address. More...

## Functions
int | XDcfgInterruptExample (XScuGic *IntcInstPtr, XDcfg *DcfgInstPtr, u16 DeviceId, u16 DcfgIntrId)
| This function downloads the Non secure bit stream to the FPGA fabric using the Device Configuration Interface. More...
int | main (void)
| Main function to call the polled mode example. More...

## Macro Definition Documentation

#define SLCR_LOCK 0xF8000004

SLCR Write Protection Lock.

Referenced by XDcfgInterruptExample().

#define SLCR_LVL_SHFTR_EN 0xF8000900

SLCR Level Shifters Enable.

Referenced by XDcfgInterruptExample().

#define SLCR_PCAP_CLK_CTRL XPAR_PS7_SLCR_0_S_AXI_BASEADDR + 0x168

SLCR PCAP clock control register address.

Referenced by XDcfgInterruptExample().

#define SLCR_UNLOCK 0xF8000008

SLCR Write Protection Unlock.

Referenced by XDcfgInterruptExample().

## Function Documentation

int main | ( | void |  | ) |

Main function to call the polled mode example.

Parameters

  None. |

Returns
  XST_SUCCESS if successful, XST_FAILURE if unsuccessful.

Note
  None.

References XDcfgInterruptExample().

int XDcfgInterruptExample | ( | XScuGic * | IntcInstPtr,
|  | XDcfg * | DcfgInstPtr,
|  | u16 | DeviceId,
|  | u16 | DcfgIntrId
| ) |  |

This function downloads the Non secure bit stream to the FPGA fabric using the Device Configuration Interface.

Parameters

  IntcInstPtr | is a pointer to the instance of the Scu GIC driver.
  DcfgInstPtr | is a pointer to the instance of XDcfg driver.
  DeviceId | is the unique device id of the device.
  DcfgIntrId | is the interrupt Id.

Returns
  XST_SUCCESS if successful, otherwise XST_FAILURE.

Note
  None

References XDcfg_Config::BaseAddr, XDcfg::Config, SLCR_LOCK, SLCR_LVL_SHFTR_EN, SLCR_PCAP_CLK_CTRL, SLCR_UNLOCK, XDcfg_CfgInitialize(), XDCFG_CTRL_PCAP_PR_MASK, XDCFG_DMA_INVALID_ADDRESS, XDcfg_EnablePCAP(), XDcfg_InterruptHandler(), XDcfg_IntrClear(), XDcfg_IntrDisable(), XDcfg_IntrEnable(), XDcfg_IntrGetStatus(), XDCFG_IXR_D_P_DONE_MASK, XDCFG_IXR_DMA_DONE_MASK, XDCFG_IXR_PCFG_DONE_MASK, XDcfg_LookupConfig(), XDcfg_ReadReg, XDcfg_SelfTest(), XDcfg_SetControlRegister(), XDcfg_SetHandler(), XDCFG_STATUS_DMA_CMD_Q_F_MASK, XDCFG_STATUS_OFFSET, and XDcfg_Transfer().

Referenced by main().