| hwicap Vitis Drivers API Documentation

- Overview
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Data Structures | Macros | Typedefs | Functions | Variables
Overview

## Data Structures
struct | XHwIcap_Config
| This typedef contains configuration information for the device. More...
struct | XHwIcap
| The XHwIcap driver instance data. More...

## Macros
#define | PCAP_CR_OFFSET 0xFFCA3008
| PCAP CR Register. More...
#define | XHwIcap_FifoWrite(InstancePtr, Data)
| Write data to the Write FIFO. More...
#define | XHwIcap_FifoRead(InstancePtr) (XHwIcap_ReadReg(((InstancePtr)->HwIcapConfig.BaseAddress), XHI_RF_OFFSET))
| Read data from the Read FIFO. More...
#define | XHwIcap_SetSizeReg(InstancePtr, Data)
| Set the number of words to be read from the Icap in the Size register. More...
#define | XHwIcap_GetControlReg(InstancePtr) (XHwIcap_ReadReg(((InstancePtr)->HwIcapConfig.BaseAddress), XHI_CR_OFFSET))
| Get the contents of the Control register. More...
#define | XHwIcap_StartConfig(InstancePtr)
| Set the Control Register to initiate a configuration (write) to the device. More...
#define | XHwIcap_StartReadBack(InstancePtr)
| Set the Control Register to initiate a ReadBack from the device. More...
#define | XHwIcap_GetStatusReg(InstancePtr) (XHwIcap_ReadReg(((InstancePtr)->HwIcapConfig.BaseAddress), XHI_SR_OFFSET))
| Get the contents of the status register. More...
#define | XHwIcap_IsTransferDone(InstancePtr) ((InstancePtr->IsTransferInProgress) ? FALSE : TRUE)
| This macro checks if the last Read/Write of the data to the Read/Write FIFO of the HwIcap device is completed. More...
#define | XHwIcap_IsDeviceBusy(InstancePtr)
| This macro checks if the last Read/Write to the ICAP device in the FPGA is completed. More...
#define | XHwIcap_IntrGlobalEnable(InstancePtr)
| This macro enables the global interrupt in the Global Interrupt Enable Register (GIER) so that the interrupt output from the HwIcap device is enabled. More...
#define | XHwIcap_IntrGlobalDisable(InstancePtr)
| This macro disables the global interrupt in the Global Interrupt Enable Register (GIER) so that the interrupt output from the HwIcap device is disabled. More...
#define | XHwIcap_IntrGetStatus(InstancePtr)
| This macro returns the interrupt status read from Interrupt Status Register(IPISR). More...
#define | XHwIcap_IntrDisable(InstancePtr, IntrMask)
| This macro disables the specified interrupts in the Interrupt Enable Register. More...
#define | XHwIcap_IntrEnable(InstancePtr, IntrMask)
| This macro enables the specified interrupts in the Interrupt Enable Register. More...
#define | XHwIcap_IntrGetEnabled(InstancePtr)
| This macro returns the interrupt status read from Interrupt Enable Register(IIER). More...
#define | XHwIcap_IntrClear(InstancePtr, IntrMask)
| This macro clears the specified interrupts in the Interrupt Status Register (IPISR). More...
#define | XHwIcap_GetWrFifoVacancy(InstancePtr) XHwIcap_ReadReg((InstancePtr)->HwIcapConfig.BaseAddress, XHI_WFV_OFFSET)
| This macro returns the vacancy of the Write FIFO. More...
#define | XHwIcap_GetRdFifoOccupancy(InstancePtr) XHwIcap_ReadReg((InstancePtr)->HwIcapConfig.BaseAddress, XHI_RFO_OFFSET)
| This macro returns the occupancy of the Read FIFO. More...
#define | XHwIcap_Type1Read(Register)
| Generates a Type 1 packet header that reads back the requested Configuration register. More...
#define | XHwIcap_Type2Read(Register) ( XHI_TYPE_2_READ | (Register << XHI_REGISTER_SHIFT))
| Generates a Type 2 packet header that reads back the requested Configuration register. More...
#define | XHwIcap_Type1Write(Register)
| Generates a Type 1 packet header that writes to the requested Configuration register. More...
#define | XHwIcap_Type2Write(Register)
| Generates a Type 2 packet header that writes to the requested Configuration register. More...
#define | XHwIcap_SetupFarV5(Top, Block, Row, ColumnAddress, MinorAddress)
| Generates a Type 1 packet header that is written to the Frame Address Register (FAR). More...
#define | XHwIcap_ReadReg(BaseAddress, RegOffset) XHwIcap_In32((BaseAddress) + (RegOffset))
| Read from the specified HwIcap device register. More...
#define | XHwIcap_WriteReg(BaseAddress, RegOffset, RegisterValue) XHwIcap_Out32((BaseAddress) + (RegOffset), (RegisterValue))
| Write to the specified HwIcap device register. More...

## Typedefs
typedef void(* | XHwIcap_StatusHandler )(void *CallBackRef, u32 StatusEvent, u32 WordCount)
| The handler data type allows the user to define a callback function to handle the asynchronous processing of the HwIcap driver. More...

## Functions
int | XHwIcap_CfgInitialize (XHwIcap *InstancePtr, XHwIcap_Config *ConfigPtr, UINTPTR EffectiveAddr)
| This function initializes a specific XHwIcap instance. More...
int | XHwIcap_DeviceWrite (XHwIcap *InstancePtr, u32 *FrameBuffer, u32 NumWords)
| This function writes the given user data to the Write FIFO in both the polled mode and the interrupt mode and starts the transfer of the data to the ICAP device. More...
int | XHwIcap_DeviceRead (XHwIcap *InstancePtr, u32 *FrameBuffer, u32 NumWords)
| This function reads the specified number of words from the ICAP device in the polled mode. More...
void | XHwIcap_Reset (XHwIcap *InstancePtr)
| This function forces the software reset of the complete HWICAP device. More...
void | XHwIcap_FlushFifo (XHwIcap *InstancePtr)
| This function flushes the FIFOs in the device. More...
void | XHwIcap_Abort (XHwIcap *InstancePtr)
| This function initiates the Abort Sequence by setting the Abort bit in the control register. More...
XHwIcap_Config * | XHwIcap_LookupConfig (u16 DeviceId)
| Looks up the device configuration based on the unique device ID. More...
int | XHwIcap_CommandDesync (XHwIcap *InstancePtr)
| Sends a DESYNC command to the ICAP port. More...
int | XHwIcap_CommandCapture (XHwIcap *InstancePtr)
| Sends a CAPTURE command to the ICAP port. More...
u32 | XHwIcap_GetConfigReg (XHwIcap *InstancePtr, u32 ConfigReg, u32 *RegData)
| This function returns the value of the specified configuration register. More...
int | XHwIcap_SelfTest (XHwIcap *InstancePtr)
| Run a self-test on the driver/device. More...
void | XHwIcap_IntrHandler (void *InstancePtr)
| The interrupt handler for HwIcap interrupts. More...
void | XHwIcap_SetInterruptHandler (XHwIcap *InstancePtr, void *CallBackRef, XHwIcap_StatusHandler FuncPtr)
| Sets the status callback function, the status handler, which the driver calls when it encounters conditions that should be reported to the higher layer software. More...
int | XHwIcap_DeviceReadFrame (XHwIcap *InstancePtr, long Top, long Block, long HClkRow, long MajorFrame, long MinorFrame, u32 *FrameBuffer)
| Reads one frame from the device and puts it in memory specified by the user. More...
int | XHwIcap_DeviceWriteFrame (XHwIcap *InstancePtr, long Top, long Block, long HClkRow, long MajorFrame, long MinorFrame, u32 *FrameData)
| Writes one frame from the specified buffer and puts it in the device (ICAP). More...

## Variables
XHwIcap_Config | XHwIcap_ConfigTable [XPAR_XHWICAP_NUM_INSTANCES]
| The configuration table for opb_hwicap devices. More...
XHwIcap_Config | XHwIcap_ConfigTable []
| The configuration table for opb_hwicap devices. More...

## Configuration Type1/Type2 packet headers masks
#define | XHI_TYPE_MASK 0x7
#define | XHI_REGISTER_MASK 0x1F
#define | XHI_OP_MASK 0x3
#define | XHI_WORD_COUNT_MASK_TYPE_1 0x7FF
#define | XHI_WORD_COUNT_MASK_TYPE_2 0x07FFFFFF
#define | XHI_TYPE_SHIFT 29
#define | XHI_REGISTER_SHIFT 13
#define | XHI_OP_SHIFT 27
#define | XHI_TYPE_1 1
#define | XHI_TYPE_2 2
#define | XHI_OP_WRITE 2
#define | XHI_OP_READ 1

## Frame Address Register mask(s)
#define | XHI_FAR_BLOCK_MASK 0x7
#define | XHI_FAR_TOP_BOTTOM_MASK 0x1
#define | XHI_FAR_ROW_ADDR_MASK 0x1F
#define | XHI_FAR_COLUMN_ADDR_MASK 0x3FF
#define | XHI_FAR_MINOR_ADDR_MASK 0x7F
#define | XHI_FAR_BLOCK_SHIFT 23
#define | XHI_FAR_TOP_BOTTOM_SHIFT 22
#define | XHI_FAR_ROW_ADDR_SHIFT 17
#define | XHI_FAR_COLUMN_ADDR_SHIFT 7
#define | XHI_FAR_MINOR_ADDR_SHIFT 0
#define | XHI_FAR_CLB_BLOCK 0
| CLB/IO/CLK Block. More...
#define | XHI_FAR_BRAM_BLOCK 1
| Block RAM interconnect. More...
#define | XHI_FAR_CFG_CLB_BLOCK 2
| CFG CLB Block. More...

## Register Map
Register offsets for the XHwIcap device.
#define | XHI_GIER_OFFSET 0x1C
| Device Global Interrupt Enable Reg. More...
#define | XHI_IPISR_OFFSET 0x20
| Interrupt Status Register. More...
#define | XHI_IPIER_OFFSET 0x28
| Interrupt Enable Register. More...
#define | XHI_WF_OFFSET 0x100
| Write FIFO. More...
#define | XHI_RF_OFFSET 0x104
| Read FIFO. More...
#define | XHI_SZ_OFFSET 0x108
| Size Register. More...
#define | XHI_CR_OFFSET 0x10C
| Control Register. More...
#define | XHI_SR_OFFSET 0x110
| Status Register. More...
#define | XHI_WFV_OFFSET 0x114
| Write FIFO Vacancy Register. More...
#define | XHI_RFO_OFFSET 0x118
| Read FIFO Occupancy Register. More...

## Device Global Interrupt Enable Register (GIER) bit definitions
#define | XHI_GIER_GIE_MASK 0x80000000
| Global Interrupt enable Mask. More...

## HwIcap Device Interrupt Status/Enable Registers
Interrupt Status Register (IPISR) This register holds the interrupt status flags for the device. These bits are toggle on write. Interrupt Enable Register (IPIER) This register is used to enable interrupt sources for the device. Writing a '1' to a bit in this register enables the corresponding Interrupt. Writing a '0' to a bit in this register disables the corresponding Interrupt. IPISR/IPIER registers have the same bit definitions and are only defined once.
#define | XHI_IPIXR_RFULL_MASK 0x00000008
| Read FIFO Full. More...
#define | XHI_IPIXR_WEMPTY_MASK 0x00000004
| Write FIFO Empty. More...
#define | XHI_IPIXR_RDP_MASK 0x00000002
| Read FIFO half full. More...
#define | XHI_IPIXR_WRP_MASK 0x00000001
| Write FIFO half full. More...
#define | XHI_IPIXR_ALL_MASK 0x0000000F
| Mask of all interrupts. More...

## Control Register (CR)
#define | XHI_CR_SW_ABORT_MASK 0x00000010
| Abort current ICAP Read/Write. More...
#define | XHI_CR_SW_RESET_MASK 0x00000008
| SW Reset Mask. More...
#define | XHI_CR_FIFO_CLR_MASK 0x00000004
| FIFO Clear Mask. More...
#define | XHI_CR_READ_MASK 0x00000002
| Read from ICAP to FIFO. More...
#define | XHI_CR_WRITE_MASK 0x00000001
| Write from FIFO to ICAP. More...

## Status Register (SR)
#define | XHI_SR_CFGERR_N_MASK 0x00000100
| Config Error Mask. More...
#define | XHI_SR_DALIGN_MASK 0x00000080
| Data Alignment Mask. More...
#define | XHI_SR_RIP_MASK 0x00000040
| Read back Mask. More...
#define | XHI_SR_IN_ABORT_N_MASK 0x00000020
| Select Map Abort Mask. More...
#define | XHI_SR_DONE_MASK 0x00000001
| Done bit Mask. More...
#define | XHI_SR_EOS_MASK 0x00000004
| EOS bit Mask. More...

## Macro Definition Documentation

#define PCAP_CR_OFFSET 0xFFCA3008

PCAP CR Register.

Referenced by XHwIcap_CfgInitialize().

#define XHI_CR_FIFO_CLR_MASK 0x00000004

FIFO Clear Mask.

Referenced by XHwIcap_FlushFifo().

#define XHI_CR_OFFSET 0x10C

Control Register.

Referenced by HwIcapLowLevelExample(), XHwIcap_Abort(), XHwIcap_DeviceRead(), XHwIcap_DeviceWrite(), XHwIcap_FlushFifo(), XHwIcap_GetConfigReg(), and XHwIcap_Reset().

#define XHI_CR_READ_MASK 0x00000002

Read from ICAP to FIFO.

Referenced by HwIcapLowLevelExample(), and XHwIcap_DeviceRead().

#define XHI_CR_SW_ABORT_MASK 0x00000010

Abort current ICAP Read/Write.

Referenced by XHwIcap_Abort().

#define XHI_CR_SW_RESET_MASK 0x00000008

SW Reset Mask.

Referenced by XHwIcap_Reset().

#define XHI_CR_WRITE_MASK 0x00000001

Write from FIFO to ICAP.

Referenced by HwIcapLowLevelExample(), XHwIcap_DeviceWrite(), and XHwIcap_GetConfigReg().

#define XHI_FAR_BRAM_BLOCK 1

Block RAM interconnect.

#define XHI_FAR_CFG_CLB_BLOCK 2

CFG CLB Block.

#define XHI_FAR_CLB_BLOCK 0

CLB/IO/CLK Block.

#define XHI_GIER_GIE_MASK 0x80000000

Global Interrupt enable Mask.

#define XHI_GIER_OFFSET 0x1C

Device Global Interrupt Enable Reg.

Referenced by XHwIcap_SelfTest().

#define XHI_IPIER_OFFSET 0x28

Interrupt Enable Register.

#define XHI_IPISR_OFFSET 0x20

Interrupt Status Register.

#define XHI_IPIXR_ALL_MASK 0x0000000F

Mask of all interrupts.

Referenced by XHwIcap_SelfTest().

#define XHI_IPIXR_RDP_MASK 0x00000002

Read FIFO half full.

Referenced by XHwIcap_SelfTest().

#define XHI_IPIXR_RFULL_MASK 0x00000008

Read FIFO Full.

#define XHI_IPIXR_WEMPTY_MASK 0x00000004

Write FIFO Empty.

Referenced by XHwIcap_SelfTest().

#define XHI_IPIXR_WRP_MASK 0x00000001

Write FIFO half full.

Referenced by HwIcapIntrExample(), and XHwIcap_IntrHandler().

#define XHI_RF_OFFSET 0x104

Read FIFO.

Referenced by HwIcapLowLevelExample().

#define XHI_RFO_OFFSET 0x118

Read FIFO Occupancy Register.

#define XHI_SR_CFGERR_N_MASK 0x00000100

Config Error Mask.

#define XHI_SR_DALIGN_MASK 0x00000080

Data Alignment Mask.

#define XHI_SR_DONE_MASK 0x00000001

Done bit Mask.

Referenced by HwIcapLowLevelExample().

#define XHI_SR_EOS_MASK 0x00000004

EOS bit Mask.

Referenced by XHwIcap_GetConfigReg().

#define XHI_SR_IN_ABORT_N_MASK 0x00000020

Select Map Abort Mask.

#define XHI_SR_OFFSET 0x110

Status Register.

Referenced by HwIcapLowLevelExample(), and XHwIcap_GetConfigReg().

#define XHI_SR_RIP_MASK 0x00000040

Read back Mask.

#define XHI_SZ_OFFSET 0x108

Size Register.

Referenced by HwIcapLowLevelExample().

#define XHI_WF_OFFSET 0x100

Write FIFO.

Referenced by HwIcapLowLevelExample().

#define XHI_WFV_OFFSET 0x114

Write FIFO Vacancy Register.

#define XHwIcap_FifoRead | ( |  | InstancePtr | ) | (XHwIcap_ReadReg(((InstancePtr)->HwIcapConfig.BaseAddress), XHI_RF_OFFSET))

Read data from the Read FIFO.

Parameters

  InstancePtr | is a pointer to the XHwIcap instance.

Returns
  The 32-bit Data read from the FIFO.

Note
  C-style Signature: u32 XHwIcap_FifoRead(XHwIcap *InstancePtr);

Referenced by XHwIcap_DeviceRead().

#define XHwIcap_FifoWrite | ( |  | InstancePtr,
|  |  | Data
| ) |  |

Value:
(XHwIcap_WriteReg(((InstancePtr)->HwIcapConfig.BaseAddress), \
XHI_WF_OFFSET, (Data)))
XHwIcap_WriteReg
#define XHwIcap_WriteReg(BaseAddress, RegOffset, RegisterValue)
Write to the specified HwIcap device register.
Definition: xhwicap_l.h:180
XHI_WF_OFFSET
#define XHI_WF_OFFSET
Write FIFO.
Definition: xhwicap_l.h:68

Write data to the Write FIFO.

Parameters

  InstancePtr | is a pointer to the XHwIcap instance.
  Data | is the 32-bit value to be written to the FIFO.

Returns
  None.

Note
  C-style Signature: void XHwIcap_FifoWrite(XHwIcap *InstancePtr, u32 Data);

Referenced by XHwIcap_DeviceWrite(), and XHwIcap_IntrHandler().

#define XHwIcap_GetControlReg | ( |  | InstancePtr | ) | (XHwIcap_ReadReg(((InstancePtr)->HwIcapConfig.BaseAddress), XHI_CR_OFFSET))

Get the contents of the Control register.

Parameters

  InstancePtr | is a pointer to the XHwIcap instance.

Returns
  A 32-bit value representing the contents of the Control register.

Note
  u32 XHwIcap_GetControlReg(XHwIcap *InstancePtr);

#define XHwIcap_GetRdFifoOccupancy | ( |  | InstancePtr | ) | XHwIcap_ReadReg((InstancePtr)->HwIcapConfig.BaseAddress, XHI_RFO_OFFSET)

This macro returns the occupancy of the Read FIFO.

Parameters

  InstancePtr | is a pointer to the HwIcap instance.

Returns
  The contents read from the Read FIFO Occupancy Register.

Note
  C-Style signature: u32 XHwIcap_GetRdFifoOccupancy(InstancePtr)

Referenced by XHwIcap_DeviceRead().

#define XHwIcap_GetStatusReg | ( |  | InstancePtr | ) | (XHwIcap_ReadReg(((InstancePtr)->HwIcapConfig.BaseAddress), XHI_SR_OFFSET))

Get the contents of the status register.

Parameters

  InstancePtr | is a pointer to the XHwIcap instance.

Returns
  A 32-bit value representing the contents of the status register.

Note
  u32 XHwIcap_GetStatusReg(XHwIcap *InstancePtr);

#define XHwIcap_GetWrFifoVacancy | ( |  | InstancePtr | ) | XHwIcap_ReadReg((InstancePtr)->HwIcapConfig.BaseAddress, XHI_WFV_OFFSET)

This macro returns the vacancy of the Write FIFO.

This indicates the number of words that can be written to the Write FIFO before it becomes full.

Parameters

  InstancePtr | is a pointer to the HwIcap instance.

Returns
  The contents read from the Write FIFO Vacancy Register.

Note
  C-Style signature: u32 XHwIcap_GetWrFifoVacancy(InstancePtr)

Referenced by XHwIcap_DeviceWrite(), and XHwIcap_IntrHandler().

#define XHwIcap_IntrClear | ( |  | InstancePtr,
|  |  | IntrMask
| ) |  |

Value:
XHwIcap_WriteReg((InstancePtr)->HwIcapConfig.BaseAddress, \
XHI_IPISR_OFFSET, \
XHwIcap_ReadReg((InstancePtr)->HwIcapConfig.BaseAddress, \
XHI_IPISR_OFFSET) | ((IntrMask) & XHI_IPIXR_ALL_MASK))
XHI_IPISR_OFFSET
#define XHI_IPISR_OFFSET
Interrupt Status Register.
Definition: xhwicap_l.h:66
XHwIcap_WriteReg
#define XHwIcap_WriteReg(BaseAddress, RegOffset, RegisterValue)
Write to the specified HwIcap device register.
Definition: xhwicap_l.h:180
XHwIcap_ReadReg
#define XHwIcap_ReadReg(BaseAddress, RegOffset)
Read from the specified HwIcap device register.
Definition: xhwicap_l.h:161
XHI_IPIXR_ALL_MASK
#define XHI_IPIXR_ALL_MASK
Mask of all interrupts.
Definition: xhwicap_l.h:108

This macro clears the specified interrupts in the Interrupt Status Register (IPISR).

Parameters

  InstancePtr | is a pointer to the HwIcap instance.
  IntrMask | contains the interrupts to be cleared.

Returns
  None.

Note
  Signature: void XHwIcap_DisableIntr(XHwIcap *InstancePtr, u32 IntrMask)

Referenced by XHwIcap_DeviceWrite(), and XHwIcap_IntrHandler().

#define XHwIcap_IntrDisable | ( |  | InstancePtr,
|  |  | IntrMask
| ) |  |

Value:
XHwIcap_WriteReg((InstancePtr)->HwIcapConfig.BaseAddress, \
XHI_IPIER_OFFSET, \
XHwIcap_ReadReg((InstancePtr)->HwIcapConfig.BaseAddress, \
XHI_IPIER_OFFSET) & (~ (IntrMask & XHI_IPIXR_ALL_MASK)));\
(InstancePtr)->IsPolled = TRUE;
XHwIcap_WriteReg
#define XHwIcap_WriteReg(BaseAddress, RegOffset, RegisterValue)
Write to the specified HwIcap device register.
Definition: xhwicap_l.h:180
XHI_IPIER_OFFSET
#define XHI_IPIER_OFFSET
Interrupt Enable Register.
Definition: xhwicap_l.h:67
XHwIcap_ReadReg
#define XHwIcap_ReadReg(BaseAddress, RegOffset)
Read from the specified HwIcap device register.
Definition: xhwicap_l.h:161
XHI_IPIXR_ALL_MASK
#define XHI_IPIXR_ALL_MASK
Mask of all interrupts.
Definition: xhwicap_l.h:108

This macro disables the specified interrupts in the Interrupt Enable Register.

It is non-destructive in that the register is read and only the interrupts specified is changed.

Parameters

  InstancePtr | is a pointer to the HwIcap instance.
  IntrMask | is the bit-mask of the interrupts to be disabled. Bit positions of 1 will be disabled. Bit positions of 0 will keep the previous setting. This mask is formed by OR'ing XHI_IPIXR_*_MASK bits defined in xhwicap_l.h.

Returns
  None.

Note
  Signature: void XHwIcap_IntrDisable(XHwIcap *InstancePtr, u32 IntrMask)

Referenced by XHwIcap_SelfTest().

#define XHwIcap_IntrEnable | ( |  | InstancePtr,
|  |  | IntrMask
| ) |  |

Value:
XHwIcap_WriteReg((InstancePtr)->HwIcapConfig.BaseAddress, \
XHI_IPIER_OFFSET, \
(XHwIcap_ReadReg((InstancePtr)->HwIcapConfig.BaseAddress, \
XHI_IPIER_OFFSET) | ((IntrMask) & XHI_IPIXR_ALL_MASK))); \
(InstancePtr)->IsPolled = FALSE;
XHwIcap_WriteReg
#define XHwIcap_WriteReg(BaseAddress, RegOffset, RegisterValue)
Write to the specified HwIcap device register.
Definition: xhwicap_l.h:180
XHI_IPIER_OFFSET
#define XHI_IPIER_OFFSET
Interrupt Enable Register.
Definition: xhwicap_l.h:67
XHwIcap_ReadReg
#define XHwIcap_ReadReg(BaseAddress, RegOffset)
Read from the specified HwIcap device register.
Definition: xhwicap_l.h:161
XHI_IPIXR_ALL_MASK
#define XHI_IPIXR_ALL_MASK
Mask of all interrupts.
Definition: xhwicap_l.h:108

This macro enables the specified interrupts in the Interrupt Enable Register.

It is non-destructive in that the register is read and only the interrupts specified is changed.

Parameters

  InstancePtr | is a pointer to the HwIcap instance.
  IntrMask | is the bit-mask of the interrupts to be enabled. Bit positions of 1 will be enabled. Bit positions of 0 will keep the previous setting. This mask is formed by OR'ing XHI_IPIXR_*_MASK bits defined in xhwicap_l.h.

Returns
  None.

Note
  Signature: void XHwIcap_IntrEnable(XHwIcap *InstancePtr, u32 IntrMask)

Referenced by HwIcapIntrExample(), and XHwIcap_SelfTest().

#define XHwIcap_IntrGetEnabled | ( |  | InstancePtr | ) |

Value:
XHwIcap_ReadReg((InstancePtr)->HwIcapConfig.BaseAddress, \
XHI_IPIER_OFFSET)
XHI_IPIER_OFFSET
#define XHI_IPIER_OFFSET
Interrupt Enable Register.
Definition: xhwicap_l.h:67
XHwIcap_ReadReg
#define XHwIcap_ReadReg(BaseAddress, RegOffset)
Read from the specified HwIcap device register.
Definition: xhwicap_l.h:161

This macro returns the interrupt status read from Interrupt Enable Register(IIER).

Use the XHI_IPIXR_* constants defined in xhwicap_l.h to interpret the returned value.

Parameters

  InstancePtr | is a pointer to the HwIcap instance.

Returns
  The contents read from the Interrupt Enable Register.

Note
  C-Style signature: u32 XHwIcap_IntrGetEnabled(InstancePtr)

Referenced by XHwIcap_SelfTest().

#define XHwIcap_IntrGetStatus | ( |  | InstancePtr | ) |

Value:
XHwIcap_ReadReg((InstancePtr)->HwIcapConfig.BaseAddress, \
XHI_IPISR_OFFSET)
XHI_IPISR_OFFSET
#define XHI_IPISR_OFFSET
Interrupt Status Register.
Definition: xhwicap_l.h:66
XHwIcap_ReadReg
#define XHwIcap_ReadReg(BaseAddress, RegOffset)
Read from the specified HwIcap device register.
Definition: xhwicap_l.h:161

This macro returns the interrupt status read from Interrupt Status Register(IPISR).

Use the XHI_IPIXR_* constants defined in xhwicap_l.h to interpret the returned value.

Parameters

  InstancePtr | is a pointer to the HwIcap instance.

Returns
  The contents read from the Interrupt Status Register.

Note
  C-Style signature: u32 XHwIcap_IntrGetStatus(InstancePtr)

Referenced by XHwIcap_DeviceWrite(), and XHwIcap_IntrHandler().

#define XHwIcap_IntrGlobalDisable | ( |  | InstancePtr | ) |

Value:
XHwIcap_WriteReg((InstancePtr)->HwIcapConfig.BaseAddress, \
XHI_GIER_OFFSET, 0x0)
XHI_GIER_OFFSET
#define XHI_GIER_OFFSET
Device Global Interrupt Enable Reg.
Definition: xhwicap_l.h:65
XHwIcap_WriteReg
#define XHwIcap_WriteReg(BaseAddress, RegOffset, RegisterValue)
Write to the specified HwIcap device register.
Definition: xhwicap_l.h:180

This macro disables the global interrupt in the Global Interrupt Enable Register (GIER) so that the interrupt output from the HwIcap device is disabled.

Parameters

  InstancePtr | is a pointer to the HwIcap instance.

Returns
  None.

Note
  C-Style signature: void XHwIcap_IntrGlobalDisable(InstancePtr)

Referenced by XHwIcap_DeviceWrite(), XHwIcap_IntrHandler(), and XHwIcap_SelfTest().

#define XHwIcap_IntrGlobalEnable | ( |  | InstancePtr | ) |

Value:
XHwIcap_WriteReg((InstancePtr)->HwIcapConfig.BaseAddress, \
XHI_GIER_OFFSET, XHI_GIER_GIE_MASK)
XHI_GIER_OFFSET
#define XHI_GIER_OFFSET
Device Global Interrupt Enable Reg.
Definition: xhwicap_l.h:65
XHwIcap_WriteReg
#define XHwIcap_WriteReg(BaseAddress, RegOffset, RegisterValue)
Write to the specified HwIcap device register.
Definition: xhwicap_l.h:180
XHI_GIER_GIE_MASK
#define XHI_GIER_GIE_MASK
Global Interrupt enable Mask.
Definition: xhwicap_l.h:83

This macro enables the global interrupt in the Global Interrupt Enable Register (GIER) so that the interrupt output from the HwIcap device is enabled.

Interrupts enabled using XHwIcap_IntrEnable() will not occur until the global interrupt enable bit is set by using this macro.

Parameters

  InstancePtr | is a pointer to the HwIcap instance.

Returns
  None.

Note
  C-Style signature: void XHwIcap_IntrGlobalEnable(InstancePtr)

Referenced by XHwIcap_DeviceWrite().

#define XHwIcap_IsDeviceBusy | ( |  | InstancePtr | ) |

Value:
((XHwIcap_GetStatusReg(InstancePtr) & XHI_SR_DONE_MASK) ? \
FALSE : TRUE)
XHwIcap_GetStatusReg
#define XHwIcap_GetStatusReg(InstancePtr)
Get the contents of the status register.
Definition: xhwicap.h:403
XHI_SR_DONE_MASK
#define XHI_SR_DONE_MASK
Done bit Mask.
Definition: xhwicap_l.h:133

This macro checks if the last Read/Write to the ICAP device in the FPGA is completed.

Parameters

  InstancePtr | is a pointer to the XHwIcap instance.

Returns
  - TRUE if the last Read/Write(Config) to the ICAP is NOT completed.
  - FALSE if the Read/Write(Config) to the ICAP is completed..

Note
  C-Style signature: int XHwIcap_IsDeviceBusy(XHwIcap *InstancePtr);

Referenced by XHwIcap_DeviceRead(), XHwIcap_DeviceReadFrame(), XHwIcap_DeviceWrite(), and XHwIcap_GetConfigReg().

#define XHwIcap_IsTransferDone | ( |  | InstancePtr | ) | ((InstancePtr->IsTransferInProgress) ? FALSE : TRUE)

This macro checks if the last Read/Write of the data to the Read/Write FIFO of the HwIcap device is completed.

Parameters

  InstancePtr | is a pointer to the XHwIcap instance.

Returns
  - TRUE if the Read/Write to the FIFO's is completed.
  - FALSE if the Read/Write to the FIFO's is NOT completed..

Note
  C-Style signature: int XHwIcap_IsTransferDone(XHwIcap *InstancePtr);

Referenced by XHwIcap_DeviceRead(), and XHwIcap_DeviceWrite().

#define XHwIcap_ReadReg | ( |  | BaseAddress,
|  |  | RegOffset
| ) |  | XHwIcap_In32((BaseAddress) + (RegOffset))

Read from the specified HwIcap device register.

Parameters

  BaseAddress | contains the base address of the device.
  RegOffset | contains the offset from the 1st register of the device to select the specific register.

Returns
  The value read from the register.

Note
  C-Style signature: u32 XHwIcap_ReadReg(u32 BaseAddress, u32 RegOffset);

Referenced by HwIcapLowLevelExample(), XHwIcap_Abort(), XHwIcap_DeviceRead(), XHwIcap_DeviceWrite(), XHwIcap_FlushFifo(), XHwIcap_GetConfigReg(), XHwIcap_Reset(), and XHwIcap_SelfTest().

#define XHwIcap_SetSizeReg | ( |  | InstancePtr,
|  |  | Data
| ) |  |

Value:
(XHwIcap_WriteReg(((InstancePtr)->HwIcapConfig.BaseAddress), \
XHI_SZ_OFFSET, (Data)))
XHwIcap_WriteReg
#define XHwIcap_WriteReg(BaseAddress, RegOffset, RegisterValue)
Write to the specified HwIcap device register.
Definition: xhwicap_l.h:180
XHI_SZ_OFFSET
#define XHI_SZ_OFFSET
Size Register.
Definition: xhwicap_l.h:70

Set the number of words to be read from the Icap in the Size register.

The Size Register holds the number of 32 bit words to transfer from the the Icap to the Read FIFO of the HwIcap device.

Parameters

  InstancePtr | is a pointer to the XHwIcap instance.
  Data | is the size in words.

Returns
  None.

Note
  C-style Signature: void XHwIcap_SetSizeReg(XHwIcap *InstancePtr, u32 Data);

Referenced by XHwIcap_DeviceRead().

#define XHwIcap_SetupFarV5 | ( |  | Top,
|  |  | Block,
|  |  | Row,
|  |  | ColumnAddress,
|  |  | MinorAddress
| ) |  |

Value:
(Block << XHI_FAR_BLOCK_SHIFT) | \
((Top << XHI_FAR_TOP_BOTTOM_SHIFT) | \
(Row << XHI_FAR_ROW_ADDR_SHIFT) | \
(ColumnAddress << XHI_FAR_COLUMN_ADDR_SHIFT) | \
(MinorAddress << XHI_FAR_MINOR_ADDR_SHIFT))

Generates a Type 1 packet header that is written to the Frame Address Register (FAR).

Parameters

  Block | - Address Block Type (CLB or BRAM address space)
  Top | - top (0) or bottom (1) half of device
  Row | - Row Address
  ColumnAddress | - CLB or BRAM column
  MinorAddress | - Frame within a column

Returns
  Type 1 packet header to write the FAR

Note
  We are retaining this Macro for Backwards compatiblity Use the XHwIcap_SetupFar macro.

#define XHwIcap_StartConfig | ( |  | InstancePtr | ) |

Value:
(XHwIcap_WriteReg(((InstancePtr)->HwIcapConfig.BaseAddress), XHI_CR_OFFSET, \
(XHwIcap_GetControlReg(InstancePtr) & \
(~ XHI_CR_READ_MASK)) | XHI_CR_WRITE_MASK))
XHwIcap_GetControlReg
#define XHwIcap_GetControlReg(InstancePtr)
Get the contents of the Control register.
Definition: xhwicap.h:349
XHI_CR_OFFSET
#define XHI_CR_OFFSET
Control Register.
Definition: xhwicap_l.h:71
XHwIcap_WriteReg
#define XHwIcap_WriteReg(BaseAddress, RegOffset, RegisterValue)
Write to the specified HwIcap device register.
Definition: xhwicap_l.h:180
XHI_CR_READ_MASK
#define XHI_CR_READ_MASK
Read from ICAP to FIFO.
Definition: xhwicap_l.h:119
XHI_CR_WRITE_MASK
#define XHI_CR_WRITE_MASK
Write from FIFO to ICAP.
Definition: xhwicap_l.h:120

Set the Control Register to initiate a configuration (write) to the device.

Parameters

  InstancePtr | is a pointer to the XHwIcap instance.

Returns
  None.

Note
  C-style Signature: void XHwIcap_StartConfig(XHwIcap *InstancePtr);

Referenced by XHwIcap_DeviceWrite(), and XHwIcap_IntrHandler().

#define XHwIcap_StartReadBack | ( |  | InstancePtr | ) |

Value:
(XHwIcap_WriteReg(((InstancePtr)->HwIcapConfig.BaseAddress) , XHI_CR_OFFSET, \
(XHwIcap_GetControlReg(InstancePtr) & \
(~ XHI_CR_WRITE_MASK)) | XHI_CR_READ_MASK))
XHwIcap_GetControlReg
#define XHwIcap_GetControlReg(InstancePtr)
Get the contents of the Control register.
Definition: xhwicap.h:349
XHI_CR_OFFSET
#define XHI_CR_OFFSET
Control Register.
Definition: xhwicap_l.h:71
XHwIcap_WriteReg
#define XHwIcap_WriteReg(BaseAddress, RegOffset, RegisterValue)
Write to the specified HwIcap device register.
Definition: xhwicap_l.h:180
XHI_CR_READ_MASK
#define XHI_CR_READ_MASK
Read from ICAP to FIFO.
Definition: xhwicap_l.h:119
XHI_CR_WRITE_MASK
#define XHI_CR_WRITE_MASK
Write from FIFO to ICAP.
Definition: xhwicap_l.h:120

Set the Control Register to initiate a ReadBack from the device.

Parameters

  InstancePtr | is a pointer to the XHwIcap instance.

Returns
  None.

Note
  C-style Signature: void XHwIcap_StartReadBack(XHwIcap *InstancePtr);

Referenced by XHwIcap_DeviceRead().

#define XHwIcap_Type1Read | ( |  | Register | ) |

Value:
( (XHI_TYPE_1 << XHI_TYPE_SHIFT) | (Register << XHI_REGISTER_SHIFT) | \
(XHI_OP_READ << XHI_OP_SHIFT) )

Generates a Type 1 packet header that reads back the requested Configuration register.

Parameters

  Register | is the address of the register to be read back.

Returns
  Type 1 packet header to read the specified register

Note
  None.

Referenced by HwIcapIntrExample(), XHwIcap_DeviceReadFrame(), and XHwIcap_GetConfigReg().

#define XHwIcap_Type1Write | ( |  | Register | ) |

Value:
( (XHI_TYPE_1 << XHI_TYPE_SHIFT) | (Register << XHI_REGISTER_SHIFT) | \
(XHI_OP_WRITE << XHI_OP_SHIFT) )

Generates a Type 1 packet header that writes to the requested Configuration register.

Parameters

  Register | is the address of the register to be written to.

Returns
  Type 1 packet header to write the specified register

Note
  None.

Referenced by XHwIcap_CommandCapture(), XHwIcap_CommandDesync(), XHwIcap_DeviceReadFrame(), and XHwIcap_DeviceWriteFrame().

#define XHwIcap_Type2Read | ( |  | Register | ) | ( XHI_TYPE_2_READ | (Register << XHI_REGISTER_SHIFT))

Generates a Type 2 packet header that reads back the requested Configuration register.

Parameters

  Register | is the address of the register to be read back.

Returns
  Type 1 packet header to read the specified register

Note
  None.

#define XHwIcap_Type2Write | ( |  | Register | ) |

Value:
( (XHI_TYPE_2 << XHI_TYPE_SHIFT) | (Register << XHI_REGISTER_SHIFT) | \
(XHI_OP_WRITE << XHI_OP_SHIFT) )

Generates a Type 2 packet header that writes to the requested Configuration register.

Parameters

  Register | is the address of the register to be written to.

Returns
  Type 1 packet header to write the specified register

Note
  None.

#define XHwIcap_WriteReg | ( |  | BaseAddress,
|  |  | RegOffset,
|  |  | RegisterValue
| ) |  | XHwIcap_Out32((BaseAddress) + (RegOffset), (RegisterValue))

Write to the specified HwIcap device register.

Parameters

  BaseAddress | contains the base address of the device.
  RegOffset | contains the offset from the 1st register of the device to select the specific register.
  RegisterValue | is the value to be written to the register.

Returns
  None.

Note
  C-Style signature: void XHwIcap_WriteReg(u32 BaseAddress, u32 RegOffset, u32 RegisterValue);

Referenced by HwIcapLowLevelExample(), XHwIcap_Abort(), XHwIcap_FlushFifo(), XHwIcap_Reset(), and XHwIcap_SelfTest().

## Typedef Documentation

typedef void(* XHwIcap_StatusHandler)(void *CallBackRef, u32 StatusEvent, u32 WordCount)

The handler data type allows the user to define a callback function to handle the asynchronous processing of the HwIcap driver.

The application using this driver is expected to define a handler of this type to support interrupt driven mode. The handler executes in an interrupt context such that minimal processing should be performed.

Parameters

  CallBackRef | is a callback reference passed in by the application layer when setting the callback functions, and passed back to the upper layer when the callback is invoked. Its type is unimportant to the driver component, so it is a void pointer.
  StatusEvent | indicates one or more status events that occurred. See the XHwIcap_SetInterruptHandler for details on the status events that can be passed in the callback.
  WordCount | indicates how many words of data were successfully transferred. This may be less than the number of words requested if there was an error.

## Function Documentation

void XHwIcap_Abort | ( | XHwIcap * | InstancePtr | ) |

This function initiates the Abort Sequence by setting the Abort bit in the control register.

Parameters

  InstancePtr | is a pointer to the XHwIcap instance.

Returns
  None.

Note
  None.

References XHwIcap_Config::BaseAddress, XHwIcap::HwIcapConfig, XHwIcap::IsReady, XHI_CR_OFFSET, XHI_CR_SW_ABORT_MASK, XHwIcap_ReadReg, and XHwIcap_WriteReg.

int XHwIcap_CfgInitialize | ( | XHwIcap * | InstancePtr,
|  | XHwIcap_Config * | ConfigPtr,
|  | UINTPTR | EffectiveAddr
| ) |  |

This function initializes a specific XHwIcap instance.

The IDCODE is read from the FPGA and based on the IDCODE the information about the resources in the FPGA is filled in the instance structure.

The HwIcap device will be in put in a reset state before exiting this function.

Parameters

  InstancePtr | is a pointer to the XHwIcap instance.
  ConfigPtr | points to the XHwIcap device configuration structure.
  EffectiveAddr | is the device base address in the virtual memory address space. If the address translation is not used then the physical address is passed. Unexpected errors may occur if the address mapping is changed after this function is invoked.

Returns
  XST_SUCCESS else XST_FAILURE

Note
  None.

Set IcapWidth

Set IsLiteMode

References XHwIcap_Config::BaseAddress, XHwIcap::BytesPerFrame, XHwIcap::DeviceFamily, XHwIcap::HwIcapConfig, XHwIcap_Config::IcapWidth, XHwIcap_Config::IsLiteMode, XHwIcap::IsPolled, XHwIcap::IsReady, XHwIcap::IsTransferInProgress, PCAP_CR_OFFSET, XHwIcap::StatusHandler, XHwIcap::WordsPerFrame, XHwIcap_CommandDesync(), XHwIcap_GetConfigReg(), and XHwIcap_Reset().

Referenced by HwIcapIntrExample(), HwIcapReadConfigRegExample(), HwIcapReadFramePolledExample(), and HwIcapTestAppExample().

int XHwIcap_CommandCapture | ( | XHwIcap * | InstancePtr | ) |

Sends a CAPTURE command to the ICAP port.

This command captures all of the flip flop states so they will be available during readback. One can use this command instead of enabling the CAPTURE block in the design.

Parameters

  InstancePtr | is a pointer to the XHwIcap instance.

Returns
  XST_SUCCESS or XST_FAILURE

Note
  None.

References XHwIcap::IsReady, XHwIcap_DeviceWrite(), and XHwIcap_Type1Write.

int XHwIcap_CommandDesync | ( | XHwIcap * | InstancePtr | ) |

Sends a DESYNC command to the ICAP port.

Parameters

  InstancePtr | - a pointer to the XHwIcap instance to be worked on

Returns
  XST_SUCCESS else XST_FAILURE

Note
  None.

References XHwIcap::IsReady, XHwIcap_DeviceWrite(), and XHwIcap_Type1Write.

Referenced by XHwIcap_CfgInitialize(), XHwIcap_DeviceReadFrame(), and XHwIcap_DeviceWriteFrame().

int XHwIcap_DeviceRead | ( | XHwIcap * | InstancePtr,
|  | u32 * | FrameBuffer,
|  | u32 | NumWords
| ) |  |

This function reads the specified number of words from the ICAP device in the polled mode.

Interrupt mode is not supported in reading data from the ICAP device.

Parameters

  InstancePtr | is a pointer to the XHwIcap instance.
  FrameBuffer | is a pointer to the memory where the frame read from the ICAP device is stored.
  NumWords | is the number of words (16 bit for S6 and 32 bit for all other devices) to write to the ICAP device.

Returns
  - XST_SUCCESS if the specified number of words have been read from the ICAP device
  - XST_FAILURE if the device is busy with the last Read/Write or if the requested number of words have not been read from the ICAP device, or there is a timeout.

Note
  This is a blocking function.

References XHwIcap_Config::BaseAddress, XHwIcap::HwIcapConfig, XHwIcap_Config::IcapWidth, XHwIcap::IsReady, XHwIcap::IsTransferInProgress, XHwIcap::RemainingWords, XHwIcap::RequestedWords, XHI_CR_OFFSET, XHI_CR_READ_MASK, XHwIcap_FifoRead, XHwIcap_GetRdFifoOccupancy, XHwIcap_IsDeviceBusy, XHwIcap_IsTransferDone, XHwIcap_ReadReg, XHwIcap_SetSizeReg, and XHwIcap_StartReadBack.

Referenced by XHwIcap_DeviceReadFrame(), and XHwIcap_GetConfigReg().

int XHwIcap_DeviceReadFrame | ( | XHwIcap * | InstancePtr,
|  | long | Top,
|  | long | Block,
|  | long | HClkRow,
|  | long | MajorFrame,
|  | long | MinorFrame,
|  | u32 * | FrameBuffer
| ) |  |

Reads one frame from the device and puts it in memory specified by the user.

Parameters

  InstancePtr | - a pointer to the XHwIcap instance to be worked on.
  Top | - top (0) or bottom (1) half of device
  Block | - Block Address (XHI_FAR_CLB_BLOCK, XHI_FAR_BRAM_BLOCK, XHI_FAR_BRAM_INT_BLOCK)
  HClkRow | - selects the HClk Row
  MajorFrame | - selects the column
  MinorFrame | - selects frame inside column
  FrameBuffer | is a pointer to the memory where the frame read from the device is stored

Returns
  XST_SUCCESS else XST_FAILURE.

Note
  This is a blocking call.

References XHwIcap::DeviceFamily, XHwIcap::IsReady, XHwIcap::WordsPerFrame, XHwIcap_CommandDesync(), XHwIcap_DeviceRead(), XHwIcap_DeviceWrite(), XHwIcap_IsDeviceBusy, XHwIcap_Type1Read, and XHwIcap_Type1Write.

Referenced by HwIcapReadFramePolledExample().

int XHwIcap_DeviceWrite | ( | XHwIcap * | InstancePtr,
|  | u32 * | FrameBuffer,
|  | u32 | NumWords
| ) |  |

This function writes the given user data to the Write FIFO in both the polled mode and the interrupt mode and starts the transfer of the data to the ICAP device.

In the polled mode, this function will write the specified number of words into the FIFO before returning.

In the interrupt mode, this function will write the words upto the size of the Write FIFO and starts the transfer, then subsequent transfer of the data is performed by the interrupt service routine until the entire buffer has been transferred. The status callback function is called when the entire buffer has been sent. In order to use interrupts, it is necessary for the user to connect the driver interrupt handler, XHwIcap_IntrHandler(), to the interrupt system of the application and enable the interrupts associated with the Write FIFO. The user has to enable the interrupts each time this function is called using the XHwIcap_IntrEnable macro.

Parameters

  InstancePtr | is a pointer to the XHwIcap instance.
  FrameBuffer | is a pointer to the data to be written to the ICAP device.
  NumWords | is the number of words (16 bit for S6 and 32 bit for all other devices)to write to the ICAP device.

Returns
  XST_SUCCESS or XST_FAILURE

Note
  This function is a blocking for the polled mode of operation and is non-blocking for the interrupt mode of operation. Use the function XHwIcap_DeviceWriteFrame for writing a frame of data to the ICAP device.

References XHwIcap_Config::BaseAddress, XHwIcap::HwIcapConfig, XHwIcap_Config::IcapWidth, XHwIcap::IsPolled, XHwIcap::IsReady, XHwIcap::IsTransferInProgress, XHwIcap::RemainingWords, XHwIcap::RequestedWords, XHI_CR_OFFSET, XHI_CR_WRITE_MASK, XHwIcap_FifoWrite, XHwIcap_GetWrFifoVacancy, XHwIcap_IntrClear, XHwIcap_IntrGetStatus, XHwIcap_IntrGlobalDisable, XHwIcap_IntrGlobalEnable, XHwIcap_IsDeviceBusy, XHwIcap_IsTransferDone, XHwIcap_ReadReg, and XHwIcap_StartConfig.

Referenced by HwIcapIntrExample(), XHwIcap_CommandCapture(), XHwIcap_CommandDesync(), XHwIcap_DeviceReadFrame(), XHwIcap_DeviceWriteFrame(), and XHwIcap_GetConfigReg().

int XHwIcap_DeviceWriteFrame | ( | XHwIcap * | InstancePtr,
|  | long | Top,
|  | long | Block,
|  | long | HClkRow,
|  | long | MajorFrame,
|  | long | MinorFrame,
|  | u32 * | FrameData
| ) |  |

Writes one frame from the specified buffer and puts it in the device (ICAP).

Parameters

  InstancePtr | is a pointer to the XHwIcap instance.
  Top | - top (0) or bottom (1) half of device
  Block | - Block Address (XHI_FAR_CLB_BLOCK, XHI_FAR_BRAM_BLOCK, XHI_FAR_BRAM_INT_BLOCK)
  HClkRow | - selects the HClk Row
  MajorFrame | - selects the column
  MinorFrame | - selects frame inside column
  FrameData | is a pointer to the frame that is to be written to the device.

Returns
  XST_SUCCESS else XST_FAILURE.

Note
  This is a blocking function. This function is used in conjunction with the function XHwIcap_DeviceReadFrame. This function is used to write back the frame of data read using the XHwIcap_DeviceReadFrame.

References XHwIcap::DeviceIdCode, XHwIcap::IsReady, XHwIcap::WordsPerFrame, XHwIcap_CommandDesync(), XHwIcap_DeviceWrite(), and XHwIcap_Type1Write.

void XHwIcap_FlushFifo | ( | XHwIcap * | InstancePtr | ) |

This function flushes the FIFOs in the device.

Parameters

  InstancePtr | is a pointer to the XHwIcap instance.

Returns
  None.

Note
  None.

References XHwIcap_Config::BaseAddress, XHwIcap::HwIcapConfig, XHwIcap::IsReady, XHI_CR_FIFO_CLR_MASK, XHI_CR_OFFSET, XHwIcap_ReadReg, and XHwIcap_WriteReg.

u32 XHwIcap_GetConfigReg | ( | XHwIcap * | InstancePtr,
|  | u32 | ConfigReg,
|  | u32 * | RegData
| ) |  |

This function returns the value of the specified configuration register.

Parameters

  InstancePtr | is a pointer to the XHwIcap instance.
  ConfigReg | is a constant which represents the configuration register value to be returned. Constants specified in xhwicap_i.h. Examples: XHI_IDCODE, XHI_FLR.
  RegData | is the value of the specified configuration register.

Returns
  XST_SUCCESS or XST_FAILURE

Note
  This is a blocking call.

References XHwIcap_Config::BaseAddress, XHwIcap::HwIcapConfig, XHwIcap::IsReady, XHI_CR_OFFSET, XHI_CR_WRITE_MASK, XHI_SR_EOS_MASK, XHI_SR_OFFSET, XHwIcap_DeviceRead(), XHwIcap_DeviceWrite(), XHwIcap_IsDeviceBusy, XHwIcap_ReadReg, and XHwIcap_Type1Read.

Referenced by HwIcapReadConfigRegExample(), HwIcapTestAppExample(), and XHwIcap_CfgInitialize().

void XHwIcap_IntrHandler | ( | void * | InstancePtr | ) |

The interrupt handler for HwIcap interrupts.

This function must be connected by the user to an interrupt source.

Parameters

  InstancePtr | is a pointer to the XHwIcap instance.

Returns
  None.

Note
  The interrupts are being used only while writing data to the ICAP device. The reading of the data from the ICAP device is done in polled mode. In a worst case scenario the interrupt handler can be busy writing large amount of data to the Write FIFO.

References XHwIcap::IsTransferInProgress, XHwIcap::RemainingWords, XHwIcap::RequestedWords, XHwIcap::StatusHandler, XHwIcap::StatusRef, XHI_IPIXR_WRP_MASK, XHwIcap_FifoWrite, XHwIcap_GetWrFifoVacancy, XHwIcap_IntrClear, XHwIcap_IntrGetStatus, XHwIcap_IntrGlobalDisable, and XHwIcap_StartConfig.

Referenced by HwIcapIntrExample().

XHwIcap_Config * XHwIcap_LookupConfig | ( | u16 | DeviceId | ) |

Looks up the device configuration based on the unique device ID.

A table contains the configuration info for each device in the system.

Parameters

  DeviceId | contains the ID of the device for which the device configuration pointer is to be returned.

Returns
  - A pointer to the configuration found.
  - NULL if the specified device ID was not found.

Note
  None.

Referenced by HwIcapIntrExample(), HwIcapReadConfigRegExample(), HwIcapReadFramePolledExample(), and HwIcapTestAppExample().

void XHwIcap_Reset | ( | XHwIcap * | InstancePtr | ) |

This function forces the software reset of the complete HWICAP device.

All the registers will return to the default value and the FIFO is also flushed as a part of this software reset.

Parameters

  InstancePtr | is a pointer to the XHwIcap instance.

Returns
  None.

Note
  None.

References XHwIcap_Config::BaseAddress, XHwIcap::HwIcapConfig, XHwIcap::IsReady, XHI_CR_OFFSET, XHI_CR_SW_RESET_MASK, XHwIcap_ReadReg, and XHwIcap_WriteReg.

Referenced by XHwIcap_CfgInitialize().

int XHwIcap_SelfTest | ( | XHwIcap * | InstancePtr | ) |

Run a self-test on the driver/device.

The test

- Writes to the Interrupt Enable Register and reads it back for comparison.

Parameters

  InstancePtr | is a pointer to the XHwIcap instance.

Returns
  - XST_SUCCESS if the value read from the register is the same as the value written.
  - XST_FAILURE otherwise

Note
  None.

References XHwIcap_Config::BaseAddress, XHwIcap::HwIcapConfig, XHwIcap::IsReady, XHI_GIER_OFFSET, XHI_IPIXR_ALL_MASK, XHI_IPIXR_RDP_MASK, XHI_IPIXR_WEMPTY_MASK, XHwIcap_IntrDisable, XHwIcap_IntrEnable, XHwIcap_IntrGetEnabled, XHwIcap_IntrGlobalDisable, XHwIcap_ReadReg, and XHwIcap_WriteReg.

Referenced by HwIcapIntrExample(), HwIcapReadConfigRegExample(), HwIcapReadFramePolledExample(), and HwIcapTestAppExample().

void XHwIcap_SetInterruptHandler | ( | XHwIcap * | InstancePtr,
|  | void * | CallBackRef,
|  | XHwIcap_StatusHandler | FuncPtr
| ) |  |

Sets the status callback function, the status handler, which the driver calls when it encounters conditions that should be reported to the higher layer software.

The handler executes in an interrupt context, so it must minimize the amount of processing performed such as transferring data to a thread context. One of the following status events is passed to the status handler.

Parameters

  InstancePtr | is a pointer to the XHwIcap instance.
  CallBackRef | is the upper layer callback reference passed back when the callback function is invoked.
  FuncPtr | is the pointer to the callback function.

Returns
  None.

Note

The handler is called within interrupt context, so it should do its work quickly and queue potentially time-consuming work to a task-level thread.

References XHwIcap::IsReady, XHwIcap::StatusHandler, and XHwIcap::StatusRef.

Referenced by HwIcapIntrExample().

## Variable Documentation

XHwIcap_Config XHwIcap_ConfigTable[]

The configuration table for opb_hwicap devices.

XHwIcap_Config XHwIcap_ConfigTable[XPAR_XHWICAP_NUM_INSTANCES]

Initial value:
= {
{
XPAR_HWICAP_0_DEVICE_ID,
XPAR_HWICAP_0_BASEADDR,
},
}

The configuration table for opb_hwicap devices.