| iicps Vitis Drivers API Documentation

- Overview
- Data Structures
- APIs
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Data Structures | Macros | Typedefs | Functions | Variables
IICPS APIs

## Data Structures
struct | XIicPs_Config
| This typedef contains configuration information for the device. More...
struct | XIicPs
| The XIicPs driver instance data. More...

## Macros
#define | XIICPS_H
| by using protection macros More...
#define | SENDING_ROLE 1
| name Role constants More...
#define | RECVING_ROLE 0
| Transfer direction is receiving. More...
#define | XIICPS_MAX_TRANSFER_SIZE ((u32)255U - (u32)3U)
| Max transfer size. More...
#define | XIicPs_SendByte(InstancePtr)
| Place one byte into the transmit FIFO. More...
#define | XIicPs_RecvByte(InstancePtr)
| Receive one byte from FIFO. More...
#define | XIICPS_HW_H
| by using protection macros More...
#define | XIicPs_ReadReg(BaseAddress, RegOffset) XIicPs_In32((BaseAddress) + (u32)(RegOffset))
| Reads an IIC register. More...
#define | XIicPs_WriteReg(BaseAddress, RegOffset, RegisterValue) XIicPs_Out32((BaseAddress) + (u32)(RegOffset), (u32)(RegisterValue))
| Writes an IIC register. More...
#define | XIicPs_ReadIER(BaseAddress) XIicPs_ReadReg((BaseAddress), XIICPS_IER_OFFSET)
| Reads the interrupt enable register. More...
#define | XIicPs_EnableInterrupts(BaseAddress, IntrMask) XIicPs_WriteReg((BaseAddress), XIICPS_IER_OFFSET, (IntrMask))
| Writes to the interrupt enable register. More...
#define | XIicPs_DisableAllInterrupts(BaseAddress)
| Disables all interrupts. More...
#define | XIicPs_DisableInterrupts(BaseAddress, IntrMask)
| Disables selected interrupts. More...
#define | TX_MAX_LOOPCNT 1000000U
| Used to wait in polled function. More...
#define | XIICPS_NUM_OPTIONS (sizeof(OptionsTable) / sizeof(OptionsMap))
| Calculated no. More...
#define | REG_TEST_VALUE 0x00000005U
| Register value to write. More...

## Typedefs
typedef void(* | XIicPs_IntrHandler )(void *CallBackRef, u32 StatusEvent)
| The handler data type allows the user to define a callback function to respond to interrupt events in the system. More...

## Functions
XIicPs_Config * | XIicPs_LookupConfig (u16 DeviceId)
| Function for configuration lookup, in xiicps_sinit.c. More...
void | XIicPs_SetStatusHandler (XIicPs *InstancePtr, void *CallBackRef, XIicPs_IntrHandler FunctionPtr)
| Functions for interrupts, in xiicps_intr.c. More...
s32 | XIicPs_SelfTest (XIicPs *InstancePtr)
| Functions for selftest, in xiicps_selftest.c. More...
void | XIicPs_ResetHw (UINTPTR BaseAddress)
| Performs the reset sequence to the given I2c interface by configuring the appropriate control bits in the I2c specific registers the i2cps reset sequence involves the following steps Disable all the interrupts Clear the status Clear FIFO's and disable hold bit Clear the line status Update relevant configuration registers with reset values. More...
void | XIicPs_MasterRead (XIicPs *InstancePtr, s32 IsHold, s32 *ByteCntPtr)
| Receives data byte by byte till Rx data is valid in interrupt master mode. More...
s32 | XIicPs_SetupMaster (XIicPs *InstancePtr, s32 Role)
| This function prepares a device to transfers as a master. More...
void | MasterSendData (XIicPs *InstancePtr)
| This function handles continuation of sending data. More...
void | XIicPs_MasterPolledRead (XIicPs *InstancePtr, s32 IsHold, s32 ByteCountVar)
| Handles polled mode receive in master mode. More...
void | XIicPs_MasterIntrSend (XIicPs *InstancePtr, u32 IntrStatusReg, u32 *StatusEventPtr)
| Handles interrupt-driven send in master mode. More...
void | XIicPs_MasterIntrRead (XIicPs *InstancePtr, u32 *IntrStatusRegPtr, s32 IsHold)
| Handles interrupt-driven receive in master mode. More...
s32 | SlaveRecvData (XIicPs *InstancePtr)
| Handles the continuation of receiving data. More...

## Variables
XIicPs_Config | XIicPs_ConfigTable []
| Configuration table. More...
XIicPs_Config | XIicPs_ConfigTable [XPAR_XIICPS_NUM_INSTANCES]
| This table contains configuration information for each IIC device in the system. More...

## Configuration options
The following options may be specified or retrieved for the device and enable/disable additional features of the IIC. Each of the options are bit fields, so more than one may be specified.
#define | XIICPS_7_BIT_ADDR_OPTION 0x01U
| 7-bit address mode More...
#define | XIICPS_10_BIT_ADDR_OPTION 0x02U
| 10-bit address mode More...
#define | XIICPS_SLAVE_MON_OPTION 0x04U
| Slave monitor mode. More...
#define | XIICPS_REP_START_OPTION 0x08U
| Repeated Start. More...

## Callback events
These constants specify the handler events that are passed to an application event handler from the driver. These constants are bit masks such that more than one event can be passed to the handler.
#define | XIICPS_EVENT_COMPLETE_SEND 0x0001U
| Transmit Complete Event. More...
#define | XIICPS_EVENT_COMPLETE_RECV 0x0002U
| Receive Complete Event. More...
#define | XIICPS_EVENT_TIME_OUT 0x0004U
| Transfer timed out. More...
#define | XIICPS_EVENT_ERROR 0x0008U
| Receive error. More...
#define | XIICPS_EVENT_ARB_LOST 0x0010U
| Arbitration lost. More...
#define | XIICPS_EVENT_NACK 0x0020U
| NACK Received. More...
#define | XIICPS_EVENT_SLAVE_RDY 0x0040U
| Slave ready. More...
#define | XIICPS_EVENT_RX_OVR 0x0080U
| RX overflow. More...
#define | XIICPS_EVENT_TX_OVR 0x0100U
| TX overflow. More...
#define | XIICPS_EVENT_RX_UNF 0x0200U
| RX underflow. More...
s32 | XIicPs_CfgInitialize (XIicPs *InstancePtr, XIicPs_Config *ConfigPtr, u32 EffectiveAddr)
| Initializes a specific XIicPs instance so that the driver is ready to use. More...
s32 | XIicPs_BusIsBusy (XIicPs *InstancePtr)
| Checks the availability of the I2C bus. More...
void | XIicPs_Abort (XIicPs *InstancePtr)
| Aborts a transfer in progress by resetting the FIFOs. More...
s32 | TransmitFifoFill (XIicPs *InstancePtr)
| Puts more data into the transmit FIFO. More...
void | XIicPs_Reset (XIicPs *InstancePtr)
| Resets the IIC device. More...
void | XIicPs_MasterSend (XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount, u16 SlaveAddr)
| Functions for device as master, in xiicps_master.c. More...
void | XIicPs_MasterRecv (XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount, u16 SlaveAddr)
| Initiates an interrupt-driven receive in master mode. More...
s32 | XIicPs_MasterSendPolled (XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount, u16 SlaveAddr)
| Initiates a polled mode send in master mode. More...
s32 | XIicPs_MasterRecvPolled (XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount, u16 SlaveAddr)
| Initiates a polled mode receive in master mode. More...
void | XIicPs_EnableSlaveMonitor (XIicPs *InstancePtr, u16 SlaveAddr)
| Enables the slave monitor mode. More...
void | XIicPs_DisableSlaveMonitor (XIicPs *InstancePtr)
| Disables slave monitor mode. More...
void | XIicPs_MasterInterruptHandler (XIicPs *InstancePtr)
| The interrupt handler for the master mode. More...
void | XIicPsSclHold (XIicPs *InstancePtr, u8 Enable)
| Enables/Disables clock stretching (SCL HOLD). More...
void | XIicPsSetTimeOut (XIicPs *InstancePtr, u8 Value)
| Sets the timeout value. More...
void | XIicPs_SetupSlave (XIicPs *InstancePtr, u16 SlaveAddr)
| Functions for device as slave, in xiicps_slave.c. More...
void | XIicPs_SlaveSend (XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount)
| Sets up a slave interrupt-driven send. More...
void | XIicPs_SlaveRecv (XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount)
| Sets up a slave interrupt-driven receive. More...
s32 | XIicPs_SlaveSendPolled (XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount)
| Sends a buffer in polled mode as a slave. More...
s32 | XIicPs_SlaveRecvPolled (XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount)
| This function receives a buffer in polled mode as a slave. More...
void | XIicPs_SlaveInterruptHandler (XIicPs *InstancePtr)
| The interrupt handler for slave mode. More...
s32 | XIicPs_SetOptions (XIicPs *InstancePtr, u32 Options)
| Functions for setting and getting data rate, in xiicps_options.c. More...
s32 | XIicPs_ClearOptions (XIicPs *InstancePtr, u32 Options)
| Clears the options for the IIC device driver. More...
u32 | XIicPs_GetOptions (XIicPs *InstancePtr)
| Gets the options for the IIC device. More...
s32 | XIicPs_SetSClk (XIicPs *InstancePtr, u32 FsclHz)
| Sets the serial clock rate for the IIC device. More...
u32 | XIicPs_GetSClk (XIicPs *InstancePtr)
| Sets the serial clock rate for the IIC device. More...

## Register Map
Register offsets for the IIC.
#define | XIICPS_CR_OFFSET 0x00U
| 32-bit Control More...
#define | XIICPS_SR_OFFSET 0x04U
| Status. More...
#define | XIICPS_ADDR_OFFSET 0x08U
| IIC Address. More...
#define | XIICPS_DATA_OFFSET 0x0CU
| IIC FIFO Data. More...
#define | XIICPS_ISR_OFFSET 0x10U
| Interrupt Status. More...
#define | XIICPS_TRANS_SIZE_OFFSET 0x14U
| Transfer Size. More...
#define | XIICPS_SLV_PAUSE_OFFSET 0x18U
| Slave monitor pause. More...
#define | XIICPS_TIME_OUT_OFFSET 0x1CU
| Time Out. More...
#define | XIICPS_IMR_OFFSET 0x20U
| Interrupt Enabled Mask. More...
#define | XIICPS_IER_OFFSET 0x24U
| Interrupt Enable. More...
#define | XIICPS_IDR_OFFSET 0x28U
| Interrupt Disable. More...

## IIC Interrupt Registers
IIC Interrupt Status Register This register holds the interrupt status flags for the IIC controller. Some of the flags are level triggered i.e. are set as long as the interrupt condition exists. Other flags are edge triggered, which means they are set one the interrupt condition occurs then remain set until they are cleared by software. The interrupts are cleared by writing a one to the interrupt bit position in the Interrupt Status Register. Read/Write. IIC Interrupt Enable Register This register is used to enable interrupt sources for the IIC controller. Writing a '1' to a bit in this register clears the corresponding bit in the IIC Interrupt Mask register. Write only. IIC Interrupt Disable Register This register is used to disable interrupt sources for the IIC controller. Writing a '1' to a bit in this register sets the corresponding bit in the IIC Interrupt Mask register. Write only. IIC Interrupt Mask Register This register shows the enabled/disabled status of each IIC controller interrupt source. A bit set to 1 will ignore the corresponding interrupt in the status register. A bit set to 0 means the interrupt is enabled. All mask bits are set and all interrupts are disabled after reset. Read only. All four registers have the same bit definitions. They are only defined once for each of the Interrupt Enable Register, Interrupt Disable Register, Interrupt Mask Register, and Interrupt Status Register
#define | XIICPS_IXR_ARB_LOST_MASK 0x00000200U
| Arbitration Lost Interrupt mask. More...
#define | XIICPS_IXR_RX_UNF_MASK 0x00000080U
| FIFO Receive Underflow Interrupt mask. More...
#define | XIICPS_IXR_TX_OVR_MASK 0x00000040U
| Transmit Overflow Interrupt mask. More...
#define | XIICPS_IXR_RX_OVR_MASK 0x00000020U
| Receive Overflow Interrupt mask. More...
#define | XIICPS_IXR_SLV_RDY_MASK 0x00000010U
| Monitored Slave Ready Interrupt mask. More...
#define | XIICPS_IXR_TO_MASK 0x00000008U
| Transfer Time Out Interrupt mask. More...
#define | XIICPS_IXR_NACK_MASK 0x00000004U
| NACK Interrupt mask. More...
#define | XIICPS_IXR_DATA_MASK 0x00000002U
| Data Interrupt mask. More...
#define | XIICPS_IXR_COMP_MASK 0x00000001U
| Transfer Complete Interrupt mask. More...
#define | XIICPS_IXR_DEFAULT_MASK 0x000002FFU
| Default ISR Mask. More...
#define | XIICPS_IXR_ALL_INTR_MASK 0x000002FFU
| All ISR Mask. More...

## Macro Definition Documentation

#define RECVING_ROLE 0

Transfer direction is receiving.

Referenced by XIicPs_MasterRecv(), XIicPs_MasterRecvPolled(), and XIicPs_SetupMaster().

#define REG_TEST_VALUE 0x00000005U

Register value to write.

Referenced by XIicPs_SelfTest().

#define SENDING_ROLE 1

name Role constants

These constants are used to pass into the device setup routines to set up the device according to transfer direction.Transfer direction is sending

Referenced by XIicPs_MasterSend(), and XIicPs_MasterSendPolled().

#define TX_MAX_LOOPCNT 1000000U

Used to wait in polled function.

Referenced by XIicPs_MasterSendPolled().

#define XIICPS_10_BIT_ADDR_OPTION 0x02U

10-bit address mode

Referenced by XIicPs_ClearOptions(), XIicPs_GetOptions(), and XIicPs_SetOptions().

#define XIICPS_7_BIT_ADDR_OPTION 0x01U

7-bit address mode

Referenced by XIicPs_GetOptions().

#define XIICPS_ADDR_OFFSET 0x08U

IIC Address.

Referenced by XIicPs_EnableSlaveMonitor(), XIicPs_MasterIntrRead(), XIicPs_MasterPolledRead(), XIicPs_MasterRecv(), XIicPs_MasterRecvPolled(), XIicPs_MasterSend(), XIicPs_MasterSendPolled(), and XIicPs_SetupSlave().

#define XIICPS_CR_OFFSET 0x00U

32-bit Control

Referenced by MasterSendData(), XIicPs_Abort(), XIicPs_ClearOptions(), XIicPs_DisableSlaveMonitor(), XIicPs_EnableSlaveMonitor(), XIicPs_GetOptions(), XIicPs_GetSClk(), XIicPs_MasterInterruptHandler(), XIicPs_MasterRead(), XIicPs_MasterRecv(), XIicPs_MasterRecvPolled(), XIicPs_MasterSend(), XIicPs_MasterSendPolled(), XIicPs_Reset(), XIicPs_ResetHw(), XIicPs_SelfTest(), XIicPs_SetOptions(), XIicPs_SetSClk(), XIicPs_SetupMaster(), XIicPs_SetupSlave(), XIicPs_SlaveInterruptHandler(), and XIicPsSclHold().

#define XIICPS_DATA_OFFSET 0x0CU

IIC FIFO Data.

Referenced by SlaveRecvData().

#define XIicPs_DisableAllInterrupts | ( |  | BaseAddress | ) |

Value:
XIicPs_WriteReg((BaseAddress), XIICPS_IDR_OFFSET, \
XIICPS_IXR_ALL_INTR_MASK)
XIicPs_WriteReg
#define XIicPs_WriteReg(BaseAddress, RegOffset, RegisterValue)
Writes an IIC register.
Definition: xiicps_hw.h:288
XIICPS_IDR_OFFSET
#define XIICPS_IDR_OFFSET
Interrupt Disable.
Definition: xiicps_hw.h:61
XIICPS_IXR_ALL_INTR_MASK
#define XIICPS_IXR_ALL_INTR_MASK
All ISR Mask.
Definition: xiicps_hw.h:186

Disables all interrupts.

Parameters

  BaseAddress | Contains the base address of the device.

Returns
  None.

Note
  C-Style signature: void XIicPs_DisableAllInterrupts(u32 BaseAddress)

Referenced by XIicPs_SetupMaster(), XIicPs_SetupSlave(), and XIicPsSmbusMasterReadBlockData().

#define XIicPs_DisableInterrupts | ( |  | BaseAddress,
|  |  | IntrMask
| ) |  |

Value:
XIicPs_WriteReg((BaseAddress), XIICPS_IDR_OFFSET, \
(IntrMask))
XIicPs_WriteReg
#define XIicPs_WriteReg(BaseAddress, RegOffset, RegisterValue)
Writes an IIC register.
Definition: xiicps_hw.h:288
XIICPS_IDR_OFFSET
#define XIICPS_IDR_OFFSET
Interrupt Disable.
Definition: xiicps_hw.h:61

Disables selected interrupts.

Parameters

  BaseAddress | Contains the base address of the device.
  IntrMask | Interrupts to be disabled.

Returns
  None.

Note
  C-Style signature: void XIicPs_DisableInterrupts(u32 BaseAddress, u32 IntrMask)

Referenced by XIicPs_DisableSlaveMonitor(), XIicPs_MasterInterruptHandler(), and XIicPs_SlaveInterruptHandler().

#define XIicPs_EnableInterrupts | ( |  | BaseAddress,
|  |  | IntrMask
| ) |  | XIicPs_WriteReg((BaseAddress), XIICPS_IER_OFFSET, (IntrMask))

Writes to the interrupt enable register.

Parameters

  BaseAddress | Contains the base address of the device.
  IntrMask | Interrupts to be enabled.

Returns
  None.

Note
  C-Style signature: void XIicPs_EnabledInterrupts(u32 BaseAddress, u32 IntrMask)

Referenced by XIicPs_EnableSlaveMonitor(), XIicPs_MasterIntrRead(), XIicPs_MasterRecv(), XIicPs_MasterSend(), XIicPs_SlaveRecv(), and XIicPs_SlaveSend().

#define XIICPS_EVENT_ARB_LOST 0x0010U

Arbitration lost.

Referenced by XIicPs_MasterInterruptHandler().

#define XIICPS_EVENT_COMPLETE_RECV 0x0002U

Receive Complete Event.

Referenced by Handler(), XIicPs_MasterInterruptHandler(), and XIicPs_SlaveInterruptHandler().

#define XIICPS_EVENT_COMPLETE_SEND 0x0001U

Transmit Complete Event.

Referenced by Handler(), XIicPs_MasterIntrSend(), and XIicPs_SlaveInterruptHandler().

#define XIICPS_EVENT_ERROR 0x0008U

Receive error.

Referenced by XIicPs_MasterInterruptHandler(), and XIicPs_SlaveInterruptHandler().

#define XIICPS_EVENT_NACK 0x0020U

NACK Received.

Referenced by XIicPs_MasterInterruptHandler(), and XIicPs_SlaveInterruptHandler().

#define XIICPS_EVENT_RX_OVR 0x0080U

RX overflow.

#define XIICPS_EVENT_RX_UNF 0x0200U

RX underflow.

#define XIICPS_EVENT_SLAVE_RDY 0x0040U

Slave ready.

Referenced by Handler(), and XIicPs_MasterInterruptHandler().

#define XIICPS_EVENT_TIME_OUT 0x0004U

Transfer timed out.

Referenced by XIicPs_MasterInterruptHandler(), and XIicPs_SlaveInterruptHandler().

#define XIICPS_EVENT_TX_OVR 0x0100U

TX overflow.

#define XIICPS_H

by using protection macros

#define XIICPS_HW_H

by using protection macros

#define XIICPS_IDR_OFFSET 0x28U

Interrupt Disable.

Referenced by XIicPs_Abort(), XIicPs_Reset(), and XIicPs_ResetHw().

#define XIICPS_IER_OFFSET 0x24U

Interrupt Enable.

Referenced by XIicPs_Abort().

#define XIICPS_IMR_OFFSET 0x20U

Interrupt Enabled Mask.

Referenced by XIicPs_Abort(), XIicPs_MasterInterruptHandler(), XIicPs_SelfTest(), and XIicPs_SlaveInterruptHandler().

#define XIICPS_ISR_OFFSET 0x10U

Interrupt Status.

Referenced by XIicPs_Abort(), XIicPs_MasterInterruptHandler(), XIicPs_MasterIntrRead(), XIicPs_MasterPolledRead(), XIicPs_MasterRecv(), XIicPs_MasterRecvPolled(), XIicPs_MasterSend(), XIicPs_MasterSendPolled(), XIicPs_ResetHw(), XIicPs_SlaveInterruptHandler(), XIicPs_SlaveRecv(), XIicPs_SlaveRecvPolled(), XIicPs_SlaveSend(), XIicPs_SlaveSendPolled(), and XIicPsSmbusMasterReadBlockData().

#define XIICPS_IXR_ALL_INTR_MASK 0x000002FFU

All ISR Mask.

Referenced by XIicPs_Abort(), XIicPs_MasterRecv(), XIicPs_MasterSend(), XIicPs_Reset(), XIicPs_ResetHw(), XIicPs_SelfTest(), XIicPs_SlaveRecv(), and XIicPs_SlaveSend().

#define XIICPS_IXR_ARB_LOST_MASK 0x00000200U

Arbitration Lost Interrupt mask.

Referenced by XIicPs_MasterInterruptHandler(), XIicPs_MasterIntrRead(), XIicPs_MasterPolledRead(), XIicPs_MasterRecv(), XIicPs_MasterRecvPolled(), XIicPs_MasterSend(), and XIicPs_MasterSendPolled().

#define XIICPS_IXR_COMP_MASK 0x00000001U

Transfer Complete Interrupt mask.

Referenced by XIicPs_MasterInterruptHandler(), XIicPs_MasterIntrRead(), XIicPs_MasterIntrSend(), XIicPs_MasterRecv(), XIicPs_MasterSend(), XIicPs_MasterSendPolled(), XIicPs_SlaveInterruptHandler(), XIicPs_SlaveRecv(), XIicPs_SlaveRecvPolled(), XIicPs_SlaveSend(), and XIicPs_SlaveSendPolled().

#define XIICPS_IXR_DATA_MASK 0x00000002U

Data Interrupt mask.

Referenced by XIicPs_MasterIntrRead(), XIicPs_MasterRecv(), XIicPs_SlaveInterruptHandler(), XIicPs_SlaveRecv(), XIicPs_SlaveRecvPolled(), and XIicPs_SlaveSend().

#define XIICPS_IXR_DEFAULT_MASK 0x000002FFU

Default ISR Mask.

#define XIICPS_IXR_NACK_MASK 0x00000004U

NACK Interrupt mask.

Referenced by XIicPs_MasterInterruptHandler(), XIicPs_MasterIntrRead(), XIicPs_MasterPolledRead(), XIicPs_MasterRecv(), XIicPs_MasterRecvPolled(), XIicPs_MasterSend(), XIicPs_MasterSendPolled(), XIicPs_SlaveInterruptHandler(), XIicPs_SlaveRecv(), XIicPs_SlaveSend(), and XIicPs_SlaveSendPolled().

#define XIICPS_IXR_RX_OVR_MASK 0x00000020U

Receive Overflow Interrupt mask.

Referenced by XIicPs_MasterInterruptHandler(), XIicPs_MasterIntrRead(), XIicPs_MasterPolledRead(), XIicPs_MasterRecv(), XIicPs_MasterRecvPolled(), XIicPs_SlaveInterruptHandler(), and XIicPs_SlaveRecv().

#define XIICPS_IXR_RX_UNF_MASK 0x00000080U

FIFO Receive Underflow Interrupt mask.

Referenced by XIicPs_MasterInterruptHandler(), XIicPs_MasterPolledRead(), XIicPs_MasterRecvPolled(), XIicPs_SlaveInterruptHandler(), and XIicPs_SlaveRecv().

#define XIICPS_IXR_SLV_RDY_MASK 0x00000010U

Monitored Slave Ready Interrupt mask.

Referenced by XIicPs_DisableSlaveMonitor(), XIicPs_EnableSlaveMonitor(), and XIicPs_MasterInterruptHandler().

#define XIICPS_IXR_TO_MASK 0x00000008U

Transfer Time Out Interrupt mask.

Referenced by XIicPs_MasterInterruptHandler(), XIicPs_MasterRecv(), XIicPs_MasterSend(), XIicPs_SlaveInterruptHandler(), XIicPs_SlaveRecv(), and XIicPs_SlaveSend().

#define XIICPS_IXR_TX_OVR_MASK 0x00000040U

Transmit Overflow Interrupt mask.

Referenced by XIicPs_MasterInterruptHandler(), XIicPs_MasterSendPolled(), XIicPs_SlaveInterruptHandler(), and XIicPs_SlaveSend().

#define XIICPS_MAX_TRANSFER_SIZE ((u32)255U - (u32)3U)

Max transfer size.

Referenced by XIicPs_MasterIntrRead(), XIicPs_MasterPolledRead(), XIicPs_MasterRecv(), and XIicPs_MasterRecvPolled().

#define XIICPS_NUM_OPTIONS (sizeof(OptionsTable) / sizeof(OptionsMap))

Calculated no.

of options

Referenced by XIicPs_ClearOptions(), XIicPs_GetOptions(), and XIicPs_SetOptions().

#define XIicPs_ReadIER | ( |  | BaseAddress | ) | XIicPs_ReadReg((BaseAddress), XIICPS_IER_OFFSET)

Reads the interrupt enable register.

Parameters

  BaseAddress | Contains the base address of the device.

Returns
  Current bit mask that represents currently enabled interrupts.

Note
  C-Style signature: u32 XIicPs_ReadIER(u32 BaseAddress)

#define XIicPs_ReadReg | ( |  | BaseAddress,
|  |  | RegOffset
| ) |  | XIicPs_In32((BaseAddress) + (u32)(RegOffset))

Reads an IIC register.

Parameters

  BaseAddress | Contains the base address of the device.
  RegOffset | Contains the offset from the 1st register of the device to select the specific register.

Returns
  The value read from the register.

Note
  C-Style signature: u32 XIicPs_ReadReg(u32 BaseAddress. int RegOffset)

Referenced by MasterSendData(), SlaveRecvData(), TransmitFifoFill(), XIicPs_Abort(), XIicPs_BusIsBusy(), XIicPs_ClearOptions(), XIicPs_DisableSlaveMonitor(), XIicPs_EnableSlaveMonitor(), XIicPs_GetOptions(), XIicPs_GetSClk(), XIicPs_MasterInterruptHandler(), XIicPs_MasterIntrRead(), XIicPs_MasterPolledRead(), XIicPs_MasterRead(), XIicPs_MasterRecv(), XIicPs_MasterRecvPolled(), XIicPs_MasterSend(), XIicPs_MasterSendPolled(), XIicPs_ResetHw(), XIicPs_SelfTest(), XIicPs_SetOptions(), XIicPs_SetSClk(), XIicPs_SetupMaster(), XIicPs_SlaveInterruptHandler(), XIicPs_SlaveRecvPolled(), XIicPs_SlaveSendPolled(), XIicPsSclHold(), XIicPsSetTimeOut(), and XIicPsSmbusMasterReadBlockData().

#define XIicPs_RecvByte | ( |  | InstancePtr | ) |

Value:
{ \
u8 *Data, Value; \
Value = (u8)(XIicPs_In32((InstancePtr)->Config.BaseAddress \
+ (u32)XIICPS_DATA_OFFSET)); \
Data = &Value; \
*(InstancePtr)->RecvBufferPtr = *Data; \
(InstancePtr)->RecvBufferPtr += 1; \
(InstancePtr)->RecvByteCount --; \
}
XIICPS_DATA_OFFSET
#define XIICPS_DATA_OFFSET
IIC FIFO Data.
Definition: xiicps_hw.h:54

Receive one byte from FIFO.

Parameters

  InstancePtr | Pointer to the XIicPs instance.

Returns
  None.

Note
  C-Style signature: u8 XIicPs_RecvByte(XIicPs *InstancePtr)

Referenced by XIicPs_MasterRead(), and XIicPs_SlaveRecvPolled().

#define XIICPS_REP_START_OPTION 0x08U

Repeated Start.

Referenced by EepromReadDataRepStart(), XIicPs_ClearOptions(), XIicPs_GetOptions(), XIicPs_SetOptions(), XIicPsSmbusMasterReadBlockData(), and XIicPsSmbusPolledMasterReadBlockData().

#define XIicPs_SendByte | ( |  | InstancePtr | ) |

Value:
{ \
u8 Data; \
Data = *((InstancePtr)->SendBufferPtr); \
XIicPs_Out32((InstancePtr)->Config.BaseAddress \
+ (u32)(XIICPS_DATA_OFFSET), \
(u32)(Data)); \
(InstancePtr)->SendBufferPtr += 1; \
(InstancePtr)->SendByteCount -= 1;\
}
XIICPS_DATA_OFFSET
#define XIICPS_DATA_OFFSET
IIC FIFO Data.
Definition: xiicps_hw.h:54

Place one byte into the transmit FIFO.

Parameters

  InstancePtr | Pointer to the XIicPs instance.

Returns
  None.

Note
  C-Style signature: void XIicPs_SendByte(XIicPs *InstancePtr)

Referenced by TransmitFifoFill(), and XIicPs_SlaveSendPolled().

#define XIICPS_SLAVE_MON_OPTION 0x04U

Slave monitor mode.

#define XIICPS_SLV_PAUSE_OFFSET 0x18U

Slave monitor pause.

Referenced by XIicPs_EnableSlaveMonitor(), and XIicPs_SelfTest().

#define XIICPS_SR_OFFSET 0x04U

Status.

Referenced by SlaveRecvData(), XIicPs_BusIsBusy(), XIicPs_MasterSendPolled(), XIicPs_ResetHw(), XIicPs_SlaveRecvPolled(), and XIicPs_SlaveSendPolled().

#define XIICPS_TIME_OUT_OFFSET 0x1CU

Time Out.

Referenced by XIicPs_Reset(), XIicPs_ResetHw(), and XIicPsSetTimeOut().

#define XIICPS_TRANS_SIZE_OFFSET 0x14U

Transfer Size.

Referenced by TransmitFifoFill(), XIicPs_EnableSlaveMonitor(), XIicPs_MasterIntrRead(), XIicPs_MasterPolledRead(), XIicPs_MasterRecv(), XIicPs_MasterRecvPolled(), XIicPs_ResetHw(), and XIicPs_SetSClk().

#define XIicPs_WriteReg | ( |  | BaseAddress,
|  |  | RegOffset,
|  |  | RegisterValue
| ) |  | XIicPs_Out32((BaseAddress) + (u32)(RegOffset), (u32)(RegisterValue))

Writes an IIC register.

Parameters

  BaseAddress | Contains the base address of the device.
  RegOffset | Contains the offset from the 1st register of the device to select the specific register.
  RegisterValue | Value to be written to the register.

Returns
  None.

Note
  C-Style signature: void XIicPs_WriteReg(u32 BaseAddress, int RegOffset, u32 RegisterValue)

Referenced by MasterSendData(), XIicPs_Abort(), XIicPs_ClearOptions(), XIicPs_DisableSlaveMonitor(), XIicPs_EnableSlaveMonitor(), XIicPs_MasterInterruptHandler(), XIicPs_MasterIntrRead(), XIicPs_MasterPolledRead(), XIicPs_MasterRead(), XIicPs_MasterRecv(), XIicPs_MasterRecvPolled(), XIicPs_MasterSend(), XIicPs_MasterSendPolled(), XIicPs_Reset(), XIicPs_ResetHw(), XIicPs_SelfTest(), XIicPs_SetOptions(), XIicPs_SetSClk(), XIicPs_SetupMaster(), XIicPs_SetupSlave(), XIicPs_SlaveInterruptHandler(), XIicPs_SlaveRecv(), XIicPs_SlaveRecvPolled(), XIicPs_SlaveSend(), XIicPs_SlaveSendPolled(), XIicPsSclHold(), and XIicPsSetTimeOut().

## Typedef Documentation

typedef void(* XIicPs_IntrHandler)(void *CallBackRef, u32 StatusEvent)

The handler data type allows the user to define a callback function to respond to interrupt events in the system.

This function is executed in interrupt context, so that the amount of processing should be minimized.

Parameters

  CallBackRef | Reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked. Its type is not important to the driver, so it is a void pointer.
  StatusEvent | Indicates one or more status events that occurred.

## Function Documentation

void MasterSendData | ( | XIicPs * | InstancePtr | ) |

This function handles continuation of sending data.

It is invoked from interrupt handler.

Parameters

  InstancePtr | Pointer to the XIicPs instance.

Returns
  None.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs::IsRepeatedStart, XIicPs::SendByteCount, TransmitFifoFill(), XIICPS_CR_OFFSET, XIicPs_ReadReg, and XIicPs_WriteReg.

Referenced by XIicPs_MasterIntrSend().

s32 SlaveRecvData | ( | XIicPs * | InstancePtr | ) |

Handles the continuation of receiving data.

It is invoked from interrupt handler.

Parameters

  InstancePtr | Pointer to the XIicPs instance.

Returns
  Number of bytes still expected by the instance.

Note
  None.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs::RecvByteCount, XIICPS_DATA_OFFSET, XIicPs_ReadReg, and XIICPS_SR_OFFSET.

Referenced by XIicPs_SlaveInterruptHandler().

s32 TransmitFifoFill | ( | XIicPs * | InstancePtr | ) |

Puts more data into the transmit FIFO.

The number of bytes is either the expected number of bytes for this transfer or available space in FIFO, which ever is less.

Parameters

  InstancePtr | Pointer to the XIicPs instance.

Returns
  Number of bytes left for this instance.

Note
  This is function is shared by the master and slave.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs::SendByteCount, XIicPs_ReadReg, XIicPs_SendByte, and XIICPS_TRANS_SIZE_OFFSET.

Referenced by MasterSendData(), XIicPs_MasterSend(), XIicPs_MasterSendPolled(), and XIicPs_SlaveInterruptHandler().

void XIicPs_Abort | ( | XIicPs * | InstancePtr | ) |

Aborts a transfer in progress by resetting the FIFOs.

The byte counts are cleared.

Parameters

  InstancePtr | Pointer to the XIicPs instance.

Returns
  None.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs::IsReady, XIICPS_CR_OFFSET, XIICPS_IDR_OFFSET, XIICPS_IER_OFFSET, XIICPS_IMR_OFFSET, XIICPS_ISR_OFFSET, XIICPS_IXR_ALL_INTR_MASK, XIicPs_ReadReg, and XIicPs_WriteReg.

Referenced by XIicPs_Reset().

s32 XIicPs_BusIsBusy | ( | XIicPs * | InstancePtr | ) |

Checks the availability of the I2C bus.

Parameters

  InstancePtr | Pointer to the XIicPs instance.

Returns
  - TRUE if the bus is busy.

- FALSE if the bus is not busy.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs_ReadReg, and XIICPS_SR_OFFSET.

Referenced by EepromReadDataRepStart(), EepromWriteData(), IicPsMasterIntrExample(), IicPsMasterPolledExample(), IicPsMultiMasterIntrExample(), IicPsMultiMasterPolledExample(), IicPsSlaveIntrExample(), IicPsSlavePolledExample(), XIicPs_SetupMaster(), XIicPsSmbusMasterIntrExample(), XIicPsSmbusMasterReadBlockData(), XIicPsSmbusMasterWriteBlockData(), XIicPsSmbusPolledMasterReadBlockData(), and XIicPsSmbusPolledMasterWriteBlockData().

s32 XIicPs_CfgInitialize | ( | XIicPs * | InstancePtr,
|  | XIicPs_Config * | ConfigPtr,
|  | u32 | EffectiveAddr
| ) |  |

Initializes a specific XIicPs instance so that the driver is ready to use.

Functions for general setup, in xiicps.c.

The state of the device after initialization is:

- Device is disabled
- Slave mode

Parameters

  InstancePtr | Pointer to the XIicPs instance.
  ConfigPtr | Reference to a structure containing information about a specific IIC device. This function initializes an InstancePtr object for a specific device specified by the contents of Config.
  EffectiveAddr | Device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, use ConfigPtr->BaseAddress for this parameter, passing the physical address instead.

Returns
  The return value is XST_SUCCESS if successful.

References XIicPs_Config::BaseAddress, XIicPs::CallBackRef, XIicPs::Config, XIicPs_Config::DeviceId, XIicPs_Config::InputClockHz, XIicPs::IsReady, XIicPs::IsRepeatedStart, XIicPs::Options, XIicPs::StatusHandler, XIicPs_GetOptions(), and XIicPs_Reset().

Referenced by IicPsMasterIntrExample(), IicPsMasterPolledExample(), IicPsMultiMasterIntrExample(), IicPsMultiMasterPolledExample(), IicPsRepeatedStartExample(), IicPsSelfTestExample(), IicPsSlaveIntrExample(), IicPsSlavePolledExample(), IicPsSmbusSlaveIntrExample(), IicPsSmbusSlavePolledExample(), and XIicPsSmbusMasterIntrExample().

s32 XIicPs_ClearOptions | ( | XIicPs * | InstancePtr,
|  | u32 | Options
| ) |  |

Clears the options for the IIC device driver.

The options control how the device behaves relative to the IIC bus. The device must be idle rather than busy transferring data before setting these device options.

Parameters

  InstancePtr | Pointer to the XIicPs instance.
  Options | Contains the specified options to be cleared. This is a bit mask where a 1 means to turn the option off. One or more bit values may be contained in the mask. See the bit definitions named XIICPS_*_OPTION in xiicps.h.

Returns
  - XST_SUCCESS if options are successfully set.
  - XST_DEVICE_IS_STARTED if the device is currently transferring data. The transfer must complete or be aborted before setting options.

Note
  None

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs::Is10BitAddr, XIicPs::IsReady, XIicPs::IsRepeatedStart, XIicPs::Options, XIICPS_10_BIT_ADDR_OPTION, XIICPS_CR_OFFSET, XIicPs_GetOptions(), XIICPS_NUM_OPTIONS, XIicPs_ReadReg, XIICPS_REP_START_OPTION, and XIicPs_WriteReg.

Referenced by EepromReadDataRepStart(), XIicPsSmbusMasterReadBlockData(), and XIicPsSmbusPolledMasterReadBlockData().

void XIicPs_DisableSlaveMonitor | ( | XIicPs * | InstancePtr | ) |

Disables slave monitor mode.

Parameters

  InstancePtr | Pointer to the XIicPs instance.

Returns
  None.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIICPS_CR_OFFSET, XIicPs_DisableInterrupts, XIICPS_IXR_SLV_RDY_MASK, XIicPs_ReadReg, and XIicPs_WriteReg.

void XIicPs_EnableSlaveMonitor | ( | XIicPs * | InstancePtr,
|  | u16 | SlaveAddr
| ) |  |

Enables the slave monitor mode.

It enables slave monitor in the control register and enables slave ready interrupt. It then does an address transfer to slave. Interrupt handler will signal the caller if slave responds to the address transfer.

Parameters

  InstancePtr | Pointer to the XIicPs instance.
  SlaveAddr | Address of the slave to contact.

Returns
  None.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs::Is10BitAddr, XIICPS_ADDR_OFFSET, XIICPS_CR_OFFSET, XIicPs_EnableInterrupts, XIICPS_IXR_SLV_RDY_MASK, XIicPs_ReadReg, XIICPS_SLV_PAUSE_OFFSET, XIICPS_TRANS_SIZE_OFFSET, and XIicPs_WriteReg.

u32 XIicPs_GetOptions | ( | XIicPs * | InstancePtr | ) |

Gets the options for the IIC device.

The options control how the device behaves relative to the IIC bus.

Parameters

  InstancePtr | Pointer to the XIicPs instance.

Returns
  32 bit mask of the options, where a 1 means the option is on, and a 0 means to the option is off. One or more bit values may be contained in the mask. See the bit definitions named XIICPS_*_OPTION in the file xiicps.h.

Note
  None.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs::IsReady, XIicPs::IsRepeatedStart, XIICPS_10_BIT_ADDR_OPTION, XIICPS_7_BIT_ADDR_OPTION, XIICPS_CR_OFFSET, XIICPS_NUM_OPTIONS, XIicPs_ReadReg, and XIICPS_REP_START_OPTION.

Referenced by XIicPs_CfgInitialize(), XIicPs_ClearOptions(), and XIicPs_SetOptions().

u32 XIicPs_GetSClk | ( | XIicPs * | InstancePtr | ) |

Sets the serial clock rate for the IIC device.

The device must be idle rather than busy transferring data before setting these device options.

Parameters

  InstancePtr | Pointer to the XIicPs instance.

Returns
  The value of the IIC clock to the nearest Hz based on the control register settings. The actual value may not be exact to to integer math rounding errors.

Note
  None.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs_Config::InputClockHz, XIicPs::IsReady, XIICPS_CR_OFFSET, and XIicPs_ReadReg.

XIicPs_Config * XIicPs_LookupConfig | ( | u16 | DeviceId | ) |

Function for configuration lookup, in xiicps_sinit.c.

Looks up the device configuration based on the unique device ID.

A table contains the configuration info for each device in the system.

Parameters

  DeviceId | Contains the ID of the device whose configuration information is needed.

Returns
  A pointer to the configuration found or NULL if the specified device ID was not found. See xiicps.h for the definition of XIicPs_Config.

References XIicPs_ConfigTable.

Referenced by IicPsMasterIntrExample(), IicPsMasterPolledExample(), IicPsMultiMasterIntrExample(), IicPsMultiMasterPolledExample(), IicPsRepeatedStartExample(), IicPsSelfTestExample(), IicPsSlaveIntrExample(), IicPsSlavePolledExample(), IicPsSmbusSlaveIntrExample(), IicPsSmbusSlavePolledExample(), and XIicPsSmbusMasterIntrExample().

void XIicPs_MasterInterruptHandler | ( | XIicPs * | InstancePtr | ) |

The interrupt handler for the master mode.

It does the protocol handling for the interrupt-driven transfers.

Completion events and errors are signaled to upper layer for proper handling.

The interrupts that are handled are:

- DATA: This case is handled only for master receive data. The master has to request for more data (if there is more data to receive) and read the data from the FIFO.

- COMP: If the Master is transmitting data and there is more data to be sent then the data is written to the FIFO. If there is no more data to be transmitted then a completion event is signalled to the upper layer by calling the callback handler.

  If the Master is receiving data then the data is read from the FIFO and the Master has to request for more data (if there is more data to receive). If all the data has been received then a completion event is signalled to the upper layer by calling the callback handler. It is an error if the amount of received data is more than expected.

- NAK and SLAVE_RDY: This is signalled to the upper layer by calling the callback handler.
- All Other interrupts: These interrupts are marked as error. This is signalled to the upper layer by calling the callback handler.

Parameters

  InstancePtr | Pointer to the XIicPs instance.

Returns
  None.

References XIicPs_Config::BaseAddress, XIicPs::CallBackRef, XIicPs::Config, XIicPs::IsReady, XIicPs::IsRepeatedStart, XIicPs::IsSend, XIicPs::RecvByteCount, XIicPs::StatusHandler, XIICPS_CR_OFFSET, XIicPs_DisableInterrupts, XIICPS_EVENT_ARB_LOST, XIICPS_EVENT_COMPLETE_RECV, XIICPS_EVENT_ERROR, XIICPS_EVENT_NACK, XIICPS_EVENT_SLAVE_RDY, XIICPS_EVENT_TIME_OUT, XIICPS_IMR_OFFSET, XIICPS_ISR_OFFSET, XIICPS_IXR_ARB_LOST_MASK, XIICPS_IXR_COMP_MASK, XIICPS_IXR_NACK_MASK, XIICPS_IXR_RX_OVR_MASK, XIICPS_IXR_RX_UNF_MASK, XIICPS_IXR_SLV_RDY_MASK, XIICPS_IXR_TO_MASK, XIICPS_IXR_TX_OVR_MASK, XIicPs_MasterIntrRead(), XIicPs_MasterIntrSend(), XIicPs_ReadReg, and XIicPs_WriteReg.

Referenced by IicPsMasterIntrExample(), IicPsMultiMasterIntrExample(), IicPsSmbusSlaveIntrExample(), and XIicPsSmbusMasterIntrExample().

void XIicPs_MasterIntrRead | ( | XIicPs * | InstancePtr,
|  | u32 * | IntrStatusRegPtr,
|  | s32 | IsHold
| ) |  |

Handles interrupt-driven receive in master mode.

Parameters

  InstancePtr | Pointer to the XIicPs instance.
  IntrStatusRegPtr | Pointer to the interrupt status register.
  IsHold | Hold status.

Returns
  None.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs::CurrByteCount, XIicPs::IsSend, XIicPs::RecvByteCount, XIicPs::UpdateTxSize, XIICPS_ADDR_OFFSET, XIicPs_EnableInterrupts, XIICPS_ISR_OFFSET, XIICPS_IXR_ARB_LOST_MASK, XIICPS_IXR_COMP_MASK, XIICPS_IXR_DATA_MASK, XIICPS_IXR_NACK_MASK, XIICPS_IXR_RX_OVR_MASK, XIicPs_MasterRead(), XIICPS_MAX_TRANSFER_SIZE, XIicPs_ReadReg, XIICPS_TRANS_SIZE_OFFSET, and XIicPs_WriteReg.

Referenced by XIicPs_MasterInterruptHandler().

void XIicPs_MasterIntrSend | ( | XIicPs * | InstancePtr,
|  | u32 | IntrStatusReg,
|  | u32 * | StatusEventPtr
| ) |  |

Handles interrupt-driven send in master mode.

Parameters

  InstancePtr | Pointer to the XIicPs instance.
  IntrStatusReg | Value of interrupt status register.
  StatusEventPtr | Pointer to the StatusEvent.

Returns
  None.

References XIicPs::IsSend, MasterSendData(), XIicPs::SendByteCount, XIICPS_EVENT_COMPLETE_SEND, and XIICPS_IXR_COMP_MASK.

Referenced by XIicPs_MasterInterruptHandler().

void XIicPs_MasterPolledRead | ( | XIicPs * | InstancePtr,
|  | s32 | IsHold,
|  | s32 | ByteCountVar
| ) |  |

Handles polled mode receive in master mode.

Parameters

  InstancePtr | Pointer to the XIicPs instance.
  IsHold | Hold status.
  ByteCountVar | ByteCount.

Returns
  None.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs::RecvByteCount, XIicPs::UpdateTxSize, XIICPS_ADDR_OFFSET, XIICPS_ISR_OFFSET, XIICPS_IXR_ARB_LOST_MASK, XIICPS_IXR_NACK_MASK, XIICPS_IXR_RX_OVR_MASK, XIICPS_IXR_RX_UNF_MASK, XIicPs_MasterRead(), XIICPS_MAX_TRANSFER_SIZE, XIicPs_ReadReg, XIICPS_TRANS_SIZE_OFFSET, and XIicPs_WriteReg.

Referenced by XIicPs_MasterRecvPolled().

void XIicPs_MasterRead | ( | XIicPs * | InstancePtr,
|  | s32 | IsHold,
|  | s32 * | ByteCntPtr
| ) |  |

Receives data byte by byte till Rx data is valid in interrupt master mode.

Parameters

  InstancePtr | Pointer to the XIicPs instance.
  IsHold | Hold status.
  ByteCntPtr | Pointer to the byte count.

Returns
  None.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs::CurrByteCount, XIicPs::IsRepeatedStart, XIicPs::RecvByteCount, XIicPs::UpdateTxSize, XIICPS_CR_OFFSET, XIicPs_ReadReg, XIicPs_RecvByte, and XIicPs_WriteReg.

Referenced by XIicPs_MasterIntrRead(), and XIicPs_MasterPolledRead().

void XIicPs_MasterRecv | ( | XIicPs * | InstancePtr,
|  | u8 * | MsgPtr,
|  | s32 | ByteCount,
|  | u16 | SlaveAddr
| ) |  |

Initiates an interrupt-driven receive in master mode.

It sets the transfer size register so the slave can send data. The rest of the work is managed by interrupt handler.

Parameters

  InstancePtr | Pointer to the XIicPs instance.
  MsgPtr | Pointer to the receive buffer.
  ByteCount | Number of bytes to be received.
  SlaveAddr | Address of the slave we are receiving from.

Returns
  None.

Note
  This receive routine is for interrupt-driven transfer only.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs::CurrByteCount, XIicPs::IsReady, XIicPs::IsRepeatedStart, XIicPs::IsSend, XIicPs::RecvBufferPtr, XIicPs::RecvByteCount, RECVING_ROLE, XIicPs::SendBufferPtr, XIicPs::UpdateTxSize, XIICPS_ADDR_OFFSET, XIICPS_CR_OFFSET, XIicPs_EnableInterrupts, XIICPS_ISR_OFFSET, XIICPS_IXR_ALL_INTR_MASK, XIICPS_IXR_ARB_LOST_MASK, XIICPS_IXR_COMP_MASK, XIICPS_IXR_DATA_MASK, XIICPS_IXR_NACK_MASK, XIICPS_IXR_RX_OVR_MASK, XIICPS_IXR_TO_MASK, XIICPS_MAX_TRANSFER_SIZE, XIicPs_ReadReg, XIicPs_SetupMaster(), XIICPS_TRANS_SIZE_OFFSET, and XIicPs_WriteReg.

Referenced by IicPsMasterIntrExample(), IicPsMultiMasterIntrExample(), and XIicPsSmbusMasterReadBlockData().

s32 XIicPs_MasterRecvPolled | ( | XIicPs * | InstancePtr,
|  | u8 * | MsgPtr,
|  | s32 | ByteCount,
|  | u16 | SlaveAddr
| ) |  |

Initiates a polled mode receive in master mode.

It repeatedly sets the transfer size register so the slave can send data to us. It polls the data register for data to come in. If master fails to read data due arbitration lost, will return with arbitration lost status. If slave fails to send us data, it fails with time out.

Parameters

  InstancePtr | Pointer to the XIicPs instance.
  MsgPtr | Pointer to the receive buffer.
  ByteCount | Number of bytes to be received.
  SlaveAddr | Address of the slave we are receiving from.

Returns
  - XST_SUCCESS if everything went well.
  - XST_FAILURE if timed out.
  - XST_IIC_ARB_LOST if arbitration lost

Note
  This receive routine is for polled mode transfer only.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs::IsReady, XIicPs::IsRepeatedStart, XIicPs::RecvBufferPtr, XIicPs::RecvByteCount, RECVING_ROLE, XIicPs::UpdateTxSize, XIICPS_ADDR_OFFSET, XIICPS_CR_OFFSET, XIICPS_ISR_OFFSET, XIICPS_IXR_ARB_LOST_MASK, XIICPS_IXR_NACK_MASK, XIICPS_IXR_RX_OVR_MASK, XIICPS_IXR_RX_UNF_MASK, XIicPs_MasterPolledRead(), XIICPS_MAX_TRANSFER_SIZE, XIicPs_ReadReg, XIicPs_SetupMaster(), XIICPS_TRANS_SIZE_OFFSET, and XIicPs_WriteReg.

Referenced by EepromReadDataRepStart(), IicPsMasterPolledExample(), IicPsMultiMasterPolledExample(), and XIicPsSmbusPolledMasterReadBlockData().

void XIicPs_MasterSend | ( | XIicPs * | InstancePtr,
|  | u8 * | MsgPtr,
|  | s32 | ByteCount,
|  | u16 | SlaveAddr
| ) |  |

Functions for device as master, in xiicps_master.c.

Initiates an interrupt-driven send in master mode.

It tries to send the first FIFO full of data, then lets the interrupt handler to handle the rest of the data if there is any.

Parameters

  InstancePtr | Pointer to the XIicPs instance.
  MsgPtr | Pointer to the send buffer.
  ByteCount | Number of bytes to be sent.
  SlaveAddr | Address of the slave we are sending to.

Returns
  None.

Note
  This send routine is for interrupt-driven transfer only.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs::IsReady, XIicPs::IsRepeatedStart, XIicPs::IsSend, XIicPs::RecvBufferPtr, XIicPs::SendBufferPtr, XIicPs::SendByteCount, SENDING_ROLE, TransmitFifoFill(), XIICPS_ADDR_OFFSET, XIICPS_CR_OFFSET, XIicPs_EnableInterrupts, XIICPS_ISR_OFFSET, XIICPS_IXR_ALL_INTR_MASK, XIICPS_IXR_ARB_LOST_MASK, XIICPS_IXR_COMP_MASK, XIICPS_IXR_NACK_MASK, XIICPS_IXR_TO_MASK, XIicPs_ReadReg, XIicPs_SetupMaster(), and XIicPs_WriteReg.

Referenced by IicPsMasterIntrExample(), IicPsMultiMasterIntrExample(), XIicPsSmbusMasterReadBlockData(), and XIicPsSmbusMasterWriteBlockData().

s32 XIicPs_MasterSendPolled | ( | XIicPs * | InstancePtr,
|  | u8 * | MsgPtr,
|  | s32 | ByteCount,
|  | u16 | SlaveAddr
| ) |  |

Initiates a polled mode send in master mode.

It sends data to the FIFO and waits for the slave to pick them up. If master fails to send data due arbitration lost, will stop transfer and with arbitration lost status. If slave fails to remove data from FIFO, the send fails with time out.

Parameters

  InstancePtr | Pointer to the XIicPs instance.
  MsgPtr | Pointer to the send buffer.
  ByteCount | Number of bytes to be sent.
  SlaveAddr | Address of the slave we are sending to.

Returns
  - XST_SUCCESS if everything went well.
  - XST_FAILURE if timed out.
  - XST_IIC_ARB_LOST if arbitration lost

Note
  This send routine is for polled mode transfer only.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs::IsReady, XIicPs::IsRepeatedStart, XIicPs::SendBufferPtr, XIicPs::SendByteCount, SENDING_ROLE, TransmitFifoFill(), TX_MAX_LOOPCNT, XIICPS_ADDR_OFFSET, XIICPS_CR_OFFSET, XIICPS_ISR_OFFSET, XIICPS_IXR_ARB_LOST_MASK, XIICPS_IXR_COMP_MASK, XIICPS_IXR_NACK_MASK, XIICPS_IXR_TX_OVR_MASK, XIicPs_ReadReg, XIicPs_SetupMaster(), XIICPS_SR_OFFSET, and XIicPs_WriteReg.

Referenced by EepromWriteData(), IicPsMasterPolledExample(), IicPsMultiMasterPolledExample(), XIicPsSmbusPolledMasterReadBlockData(), and XIicPsSmbusPolledMasterWriteBlockData().

void XIicPs_Reset | ( | XIicPs * | InstancePtr | ) |

Resets the IIC device.

Reset must only be called after the driver has been initialized. The configuration of the device after reset is the same as its configuration after initialization. Any data transfer that is in progress is aborted.

The upper layer software is responsible for re-configuring (if necessary) and reenabling interrupts for the IIC device after the reset.

Parameters

  InstancePtr | Pointer to the XIicPs instance.

Returns
  None.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs::IsReady, XIicPs_Abort(), XIICPS_CR_OFFSET, XIICPS_IDR_OFFSET, XIICPS_IXR_ALL_INTR_MASK, XIICPS_TIME_OUT_OFFSET, and XIicPs_WriteReg.

Referenced by XIicPs_CfgInitialize(), and XIicPs_SelfTest().

void XIicPs_ResetHw | ( | UINTPTR | BaseAddress | ) |

Performs the reset sequence to the given I2c interface by configuring the appropriate control bits in the I2c specific registers the i2cps reset sequence involves the following steps Disable all the interrupts Clear the status Clear FIFO's and disable hold bit Clear the line status Update relevant configuration registers with reset values.

Parameters

  BaseAddress | Base address of the interface

Returns
  None.

Note
  This function will not modify the slcr registers that are relevant for I2c controller

References XIICPS_CR_OFFSET, XIICPS_IDR_OFFSET, XIICPS_ISR_OFFSET, XIICPS_IXR_ALL_INTR_MASK, XIicPs_ReadReg, XIICPS_SR_OFFSET, XIICPS_TIME_OUT_OFFSET, XIICPS_TRANS_SIZE_OFFSET, and XIicPs_WriteReg.

s32 XIicPs_SelfTest | ( | XIicPs * | InstancePtr | ) |

Functions for selftest, in xiicps_selftest.c.

Runs a self-test on the driver/device.

The self-test is destructive in that a reset of the device is performed in order to check the reset values of the registers and to get the device into a known state.

Upon successful return from the self-test, the device is reset.

Parameters

  InstancePtr | Pointer to the XIicPs instance.

Returns
  - XST_SUCCESS if successful.
  - XST_REGISTER_ERROR indicates a register did not read or write correctly.

Note
  None.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs::IsReady, REG_TEST_VALUE, XIICPS_CR_OFFSET, XIICPS_IMR_OFFSET, XIICPS_IXR_ALL_INTR_MASK, XIicPs_ReadReg, XIicPs_Reset(), XIICPS_SLV_PAUSE_OFFSET, and XIicPs_WriteReg.

Referenced by IicPsMasterIntrExample(), IicPsMasterPolledExample(), IicPsMultiMasterIntrExample(), IicPsMultiMasterPolledExample(), IicPsSelfTestExample(), IicPsSlaveIntrExample(), IicPsSlavePolledExample(), IicPsSmbusSlaveIntrExample(), IicPsSmbusSlavePolledExample(), and XIicPsSmbusMasterIntrExample().

s32 XIicPs_SetOptions | ( | XIicPs * | InstancePtr,
|  | u32 | Options
| ) |  |

Functions for setting and getting data rate, in xiicps_options.c.

Sets the options for the IIC device driver.

The options control how the device behaves relative to the IIC bus. The device must be idle rather than busy transferring data before setting these device options.

Parameters

  InstancePtr | Pointer to the XIicPs instance.
  Options | Contains the specified options to be set. This is a bit mask where a 1 means to turn the option on. One or more bit values may be contained in the mask. See the bit definitions named XIICPS_*_OPTION in xiicps.h.

Returns
  - XST_SUCCESS if options are successfully set.
  - XST_DEVICE_IS_STARTED if the device is currently transferring data. The transfer must complete or be aborted before setting options.

Note
  None.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs::Is10BitAddr, XIicPs::IsReady, XIicPs::IsRepeatedStart, XIicPs::Options, XIICPS_10_BIT_ADDR_OPTION, XIICPS_CR_OFFSET, XIicPs_GetOptions(), XIICPS_NUM_OPTIONS, XIicPs_ReadReg, XIICPS_REP_START_OPTION, and XIicPs_WriteReg.

Referenced by EepromReadDataRepStart(), XIicPsSmbusMasterReadBlockData(), and XIicPsSmbusPolledMasterReadBlockData().

s32 XIicPs_SetSClk | ( | XIicPs * | InstancePtr,
|  | u32 | FsclHz
| ) |  |

Sets the serial clock rate for the IIC device.

The device must be idle rather than busy transferring data before setting these device options.

The data rate is set by values in the control register. The formula for determining the correct register values is: Fscl = Fpclk/(22 x (divisor_a+1) x (divisor_b+1)) See the hardware data sheet for a full explanation of setting the serial clock rate.

Parameters

  InstancePtr | Pointer to the XIicPs instance.
  FsclHz | Clock frequency in Hz. The two most common clock rates are 100KHz and 400KHz.

Returns
  - XST_SUCCESS if options are successfully set.
  - XST_DEVICE_IS_STARTED if the device is currently transferring data. The transfer must complete or be aborted before setting options.
  - XST_FAILURE if the Fscl frequency can not be set.

Note
  The clock can not be faster than the input clock divide by 22.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs_Config::InputClockHz, XIicPs::IsReady, XIICPS_CR_OFFSET, XIicPs_ReadReg, XIICPS_TRANS_SIZE_OFFSET, and XIicPs_WriteReg.

Referenced by IicPsMasterIntrExample(), IicPsMasterPolledExample(), IicPsMultiMasterIntrExample(), IicPsMultiMasterPolledExample(), IicPsRepeatedStartExample(), IicPsSlaveIntrExample(), IicPsSlavePolledExample(), IicPsSmbusSlaveIntrExample(), IicPsSmbusSlavePolledExample(), and XIicPsSmbusMasterIntrExample().

void XIicPs_SetStatusHandler | ( | XIicPs * | InstancePtr,
|  | void * | CallBackRef,
|  | XIicPs_IntrHandler | FunctionPtr
| ) |  |

Functions for interrupts, in xiicps_intr.c.

Sets the status callback function, the status handler, which the driver calls when it encounter conditions that should be reported to the higher layer software.

The handler executes in an interrupt context, so the amount of processing should be minimized.

Refer to the xiicps.h file for a list of the Callback events. The events are defined to start with XIICPS_EVENT_*.

Parameters

  InstancePtr | Pointer to the XIicPs instance.
  CallBackRef | Upper layer callback reference passed back when the callback function is invoked.
  FunctionPtr | Pointer to the callback function.

Returns
  None.

Note

The handler is called within interrupt context, so it should finish its work quickly.

References XIicPs::CallBackRef, XIicPs::IsReady, and XIicPs::StatusHandler.

Referenced by IicPsMasterIntrExample(), IicPsMultiMasterIntrExample(), IicPsSlaveIntrExample(), IicPsSmbusSlaveIntrExample(), and XIicPsSmbusMasterIntrExample().

s32 XIicPs_SetupMaster | ( | XIicPs * | InstancePtr,
|  | s32 | Role
| ) |  |

This function prepares a device to transfers as a master.

Parameters

  InstancePtr | Pointer to the XIicPs instance.
  Role | Specifies whether the device is sending or receiving.

Returns
  - XST_SUCCESS if everything went well.
  - XST_FAILURE if bus is busy.

Note
  Interrupts are always disabled. The device which needs to use interrupts must setup interrupts after this call.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs::Is10BitAddr, RECVING_ROLE, XIicPs_BusIsBusy(), XIICPS_CR_OFFSET, XIicPs_DisableAllInterrupts, XIicPs_ReadReg, and XIicPs_WriteReg.

Referenced by XIicPs_MasterRecv(), XIicPs_MasterRecvPolled(), XIicPs_MasterSend(), and XIicPs_MasterSendPolled().

void XIicPs_SetupSlave | ( | XIicPs * | InstancePtr,
|  | u16 | SlaveAddr
| ) |  |

Functions for device as slave, in xiicps_slave.c.

Sets up the device to be a slave.

Parameters

  InstancePtr | Pointer to the XIicPs instance.
  SlaveAddr | Address of the slave we are receiving from.

Returns
  None.

Note
  Interrupt is always enabled no matter the transfer is interrupt-driven or polled mode. The device interruption depends on whether the device is connected to an interrupt controller and interrupt for the device is enabled.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs::IsReady, XIICPS_ADDR_OFFSET, XIICPS_CR_OFFSET, XIicPs_DisableAllInterrupts, and XIicPs_WriteReg.

Referenced by IicPsSlaveIntrExample(), IicPsSlavePolledExample(), IicPsSmbusSlaveIntrExample(), and IicPsSmbusSlavePolledExample().

void XIicPs_SlaveInterruptHandler | ( | XIicPs * | InstancePtr | ) |

The interrupt handler for slave mode.

It does the protocol handling for the interrupt-driven transfers.

Completion events and errors are signaled to upper layer for proper handling.

The interrupts that are handled are:

- DATA: If the instance is sending, it means that the master wants to read more data from us. Send more data, and check whether the send is complete.

  If the instance is receiving, it means that the master has written more data to us. Receive more data, and check whether the receive is complete.

- COMP: This marks that stop sequence has been sent from the master, transfer is about to terminate. However, for receiving, the master may have written us some data, so receive that first.

  It is an error if the amount of transferred data is less than expected.

- NAK: This marks that master does not want our data. It is for send only.
- Other interrupts: These interrupts are marked as error.

Parameters

  InstancePtr | Pointer to the XIicPs instance.

Returns
  None.

References XIicPs_Config::BaseAddress, XIicPs::CallBackRef, XIicPs::Config, XIicPs::IsReady, XIicPs::RecvBufferPtr, XIicPs::SendByteCount, SlaveRecvData(), XIicPs::StatusHandler, TransmitFifoFill(), XIICPS_CR_OFFSET, XIicPs_DisableInterrupts, XIICPS_EVENT_COMPLETE_RECV, XIICPS_EVENT_COMPLETE_SEND, XIICPS_EVENT_ERROR, XIICPS_EVENT_NACK, XIICPS_EVENT_TIME_OUT, XIICPS_IMR_OFFSET, XIICPS_ISR_OFFSET, XIICPS_IXR_COMP_MASK, XIICPS_IXR_DATA_MASK, XIICPS_IXR_NACK_MASK, XIICPS_IXR_RX_OVR_MASK, XIICPS_IXR_RX_UNF_MASK, XIICPS_IXR_TO_MASK, XIICPS_IXR_TX_OVR_MASK, XIicPs_ReadReg, and XIicPs_WriteReg.

Referenced by IicPsSlaveIntrExample().

void XIicPs_SlaveRecv | ( | XIicPs * | InstancePtr,
|  | u8 * | MsgPtr,
|  | s32 | ByteCount
| ) |  |

Sets up a slave interrupt-driven receive.

Data processing for the receive is handled by the interrupt handler.

Parameters

  InstancePtr | Pointer to the XIicPs instance.
  MsgPtr | Pointer to the receive buffer.
  ByteCount | Number of bytes to be received.

Returns
  None.

Note
  This routine is for interrupt-driven transfer only.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs::IsReady, XIicPs::RecvBufferPtr, XIicPs::SendBufferPtr, XIicPs_EnableInterrupts, XIICPS_ISR_OFFSET, XIICPS_IXR_ALL_INTR_MASK, XIICPS_IXR_COMP_MASK, XIICPS_IXR_DATA_MASK, XIICPS_IXR_NACK_MASK, XIICPS_IXR_RX_OVR_MASK, XIICPS_IXR_RX_UNF_MASK, XIICPS_IXR_TO_MASK, and XIicPs_WriteReg.

Referenced by IicPsSlaveIntrExample().

s32 XIicPs_SlaveRecvPolled | ( | XIicPs * | InstancePtr,
|  | u8 * | MsgPtr,
|  | s32 | ByteCount
| ) |  |

This function receives a buffer in polled mode as a slave.

Parameters

  InstancePtr | Pointer to the XIicPs instance.
  MsgPtr | Pointer to the receive buffer.
  ByteCount | Number of bytes to be received.

Returns
  - XST_SUCCESS if everything went well.
  - XST_FAILURE if timed out.

Note
  This receive routine is for polled mode transfer only.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs::IsReady, XIicPs::RecvBufferPtr, XIICPS_ISR_OFFSET, XIICPS_IXR_COMP_MASK, XIICPS_IXR_DATA_MASK, XIicPs_ReadReg, XIicPs_RecvByte, XIICPS_SR_OFFSET, and XIicPs_WriteReg.

Referenced by IicPsSlavePolledExample().

void XIicPs_SlaveSend | ( | XIicPs * | InstancePtr,
|  | u8 * | MsgPtr,
|  | s32 | ByteCount
| ) |  |

Sets up a slave interrupt-driven send.

It set the repeated start for the device with a transfer size larger than FIFO depth. Data processing for the send is initiated by the interrupt handler.

Parameters

  InstancePtr | Pointer to the XIicPs instance.
  MsgPtr | Pointer to the send buffer.
  ByteCount | Number of bytes to be sent.

Returns
  None.

Note
  This send routine is for interrupt-driven transfer only.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs::IsReady, XIicPs::RecvBufferPtr, XIicPs::SendBufferPtr, XIicPs::SendByteCount, XIicPs_EnableInterrupts, XIICPS_ISR_OFFSET, XIICPS_IXR_ALL_INTR_MASK, XIICPS_IXR_COMP_MASK, XIICPS_IXR_DATA_MASK, XIICPS_IXR_NACK_MASK, XIICPS_IXR_TO_MASK, XIICPS_IXR_TX_OVR_MASK, and XIicPs_WriteReg.

Referenced by IicPsSlaveIntrExample().

s32 XIicPs_SlaveSendPolled | ( | XIicPs * | InstancePtr,
|  | u8 * | MsgPtr,
|  | s32 | ByteCount
| ) |  |

Sends a buffer in polled mode as a slave.

Parameters

  InstancePtr | Pointer to the XIicPs instance.
  MsgPtr | Pointer to the send buffer.
  ByteCount | Number of bytes to be sent.

Returns
  - XST_SUCCESS if everything went well.
  - XST_FAILURE if master sends us data or master terminates the transfer before all data has sent out.

Note
  This send routine is for polled mode transfer only.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs::IsReady, XIicPs::SendBufferPtr, XIicPs::SendByteCount, XIICPS_ISR_OFFSET, XIICPS_IXR_COMP_MASK, XIICPS_IXR_NACK_MASK, XIicPs_ReadReg, XIicPs_SendByte, XIICPS_SR_OFFSET, and XIicPs_WriteReg.

Referenced by IicPsSlavePolledExample().

void XIicPsSclHold | ( | XIicPs * | InstancePtr,
|  | u8 | Enable
| ) |  |

Enables/Disables clock stretching (SCL HOLD).

Parameters

  InstancePtr | Pointer to the XIicPs instance.
  Enable | Value to enable/disable clock stretching (SCL HOLD). 1 to Enable 0 to Disable

References XIicPs_Config::BaseAddress, XIicPs::Config, XIICPS_CR_OFFSET, XIicPs_ReadReg, and XIicPs_WriteReg.

void XIicPsSetTimeOut | ( | XIicPs * | InstancePtr,
|  | u8 | Value
| ) |  |

Sets the timeout value.

Parameters

  InstancePtr | Pointer to the XIicPs instance.
  Value | Timeout value.

References XIicPs_Config::BaseAddress, XIicPs::Config, XIicPs_ReadReg, XIICPS_TIME_OUT_OFFSET, and XIicPs_WriteReg.

## Variable Documentation

XIicPs_Config XIicPs_ConfigTable[XPAR_XIICPS_NUM_INSTANCES]

Initial value:
= {
{
(u16)XPAR_XIICPS_0_DEVICE_ID,
(u32)XPAR_XIICPS_0_BASEADDR,
(u32)XPAR_XIICPS_0_I2C_CLK_FREQ_HZ
},
}

This table contains configuration information for each IIC device in the system.

Configuration table.

Referenced by XIicPs_LookupConfig().

XIicPs_Config XIicPs_ConfigTable[]

Configuration table.

Configuration table.

Referenced by XIicPs_LookupConfig().