| dphy Vitis Drivers API Documentation

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Data Fields
XDphy_Config Struct Reference
Overview

The configuration structure for DPHY. More...

## Data Fields
u32 | DeviceId
| Device Id. More...
UINTPTR | BaseAddr
| Base address of DPHY. More...
u32 | IsRx
| TX or RX Mode. More...
u32 | IsRegisterPresent
| Is register access allowed. More...
u32 | MaxLanesPresent
| Number of Lanes. More...
u32 | EscClkPeriod
| Escape Clock Peroid. More...
u32 | EscTimeout
| Escape Timeout. More...
u32 | HSLineRate
| High Speed Line Rate. More...
u32 | HSTimeOut
| Max Frame Length. More...
u32 | Wakeup
| Time to exit ULPS mode. More...
u32 | EnableTimeOutRegs
| Enable HS and Esc Timeout Regs. More...

## Detailed Description

The configuration structure for DPHY.

This structure passes the hardware building information to the driver

## Field Documentation

UINTPTR XDphy_Config::BaseAddr

Base address of DPHY.

Referenced by DphySelfTestExample(), XDphy_Activate(), XDphy_CfgInitialize(), XDphy_ClearDataLane(), XDphy_GetClkLaneStatus(), XDphy_GetDataLaneStatus(), XDphy_GetDLCalibStatus(), and XDphy_GetPacketCount().

u32 XDphy_Config::DeviceId

Device Id.

u32 XDphy_Config::EnableTimeOutRegs

Enable HS and Esc Timeout Regs.

Referenced by XDphy_Configure(), and XDphy_GetInfo().

u32 XDphy_Config::EscClkPeriod

Escape Clock Peroid.

u32 XDphy_Config::EscTimeout

Escape Timeout.

Referenced by XDphy_GetInfo().

u32 XDphy_Config::HSLineRate

High Speed Line Rate.

u32 XDphy_Config::HSTimeOut

Max Frame Length.

Referenced by XDphy_GetInfo(), and XDphy_SelfTest().

u32 XDphy_Config::IsRegisterPresent

Is register access allowed.

Referenced by XDphy_Activate(), XDphy_ClearDataLane(), XDphy_Configure(), XDphy_GetClkLaneMode(), XDphy_GetClkLaneStatus(), XDphy_GetDataLaneMode(), XDphy_GetDataLaneStatus(), XDphy_GetDLCalibStatus(), XDphy_GetInfo(), XDphy_GetPacketCount(), XDphy_GetRegIntfcPresent(), and XDphy_Reset().

u32 XDphy_Config::IsRx

TX or RX Mode.

Referenced by XDphy_Configure(), and XDphy_GetInfo().

u32 XDphy_Config::MaxLanesPresent

Number of Lanes.

Range 1 - 4

Referenced by XDphy_Configure(), and XDphy_GetInfo().

u32 XDphy_Config::Wakeup

Time to exit ULPS mode.