| v_hdmitxss1 Vitis Drivers API Documentation

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Data Fields
XV_HdmiTxSs1_Config Struct Reference

Video Processing Subsystem configuration structure. More...

## Data Fields
u16 | DeviceId
| DeviceId is the unique ID of the device. More...
UINTPTR | BaseAddress
| BaseAddress is the physical base address of the subsystem address range. More...
UINTPTR | HighAddress
| HighAddress is the physical MAX address of the subsystem address range. More...
XVidC_PixelsPerClock | Ppc
| Supported Pixel per Clock. More...
u8 | MaxBitsPerPixel
| Maximum Supported Color Depth. More...
u32 | DynHdr
| < Maximum FRL Rate Supporte More...
u32 | DSC
| DSC Supported. More...
u32 | AxiLiteClkFreq
| AXI Lite Clock Frequency in Hz. More...
u8 | VideoInterface
| 0 - AXI4S 1 - Native 2 - Native DE video interface More...
XV_HdmiTxSs1_SubCore | HdcpTimer
| Sub-core instance configuration. More...
XV_HdmiTxSs1_SubCore | Hdcp14
| Sub-core instance configuration. More...
XV_HdmiTxSs1_SubCore | Hdcp22
| Sub-core instance configuration. More...
XV_HdmiTxSs1_SubCore | HdmiTx1
| Sub-core instance configuration. More...
XV_HdmiTxSs1_SubCore | Vtc
| Sub-core instance configuration. More...

## Detailed Description

Video Processing Subsystem configuration structure.

Each subsystem device should have a configuration structure associated that defines the MAX supported sub-cores within subsystem

## Field Documentation

u32 XV_HdmiTxSs1_Config::AxiLiteClkFreq

AXI Lite Clock Frequency in Hz.

Referenced by XV_HdmiTxSs1_CfgInitialize(), and XV_HdmiTxSs1_SubcoreInitHdmiTx1().

UINTPTR XV_HdmiTxSs1_Config::BaseAddress

BaseAddress is the physical base address of the subsystem address range.

Referenced by XV_HdmiTxSs1_CfgInitialize(), XV_HdmiTxSS1_SetHpdTolerance(), XV_HdmiTxSs1_SubcoreInitHdmiTx1(), and XV_HdmiTxSs1_SubcoreInitVtc().

u16 XV_HdmiTxSs1_Config::DeviceId

DeviceId is the unique ID of the device.

Referenced by XV_HdmiTxSs1_CfgInitialize().

u32 XV_HdmiTxSs1_Config::DSC

DSC Supported.

u32 XV_HdmiTxSs1_Config::DynHdr

< Maximum FRL Rate Supporte

Supports Dynamic HDR

Referenced by XV_HdmiTxSs1_DynHdr_Cfg(), XV_HdmiTxSs1_DynHdr_Control(), XV_HdmiTxSs1_DynHdr_DM_Control(), XV_HdmiTxSs1_DynHdr_GetErr(), and XV_HdmiTxSs1_DynHdr_GOF_Control().

XV_HdmiTxSs1_SubCore XV_HdmiTxSs1_Config::Hdcp14

Sub-core instance configuration.

XV_HdmiTxSs1_SubCore XV_HdmiTxSs1_Config::Hdcp22

Sub-core instance configuration.

XV_HdmiTxSs1_SubCore XV_HdmiTxSs1_Config::HdcpTimer

Sub-core instance configuration.

XV_HdmiTxSs1_SubCore XV_HdmiTxSs1_Config::HdmiTx1

Sub-core instance configuration.

Referenced by XV_HdmiTxSs1_SubcoreInitHdmiTx1().

UINTPTR XV_HdmiTxSs1_Config::HighAddress

HighAddress is the physical MAX address of the subsystem address range.

u8 XV_HdmiTxSs1_Config::MaxBitsPerPixel

Maximum Supported Color Depth.

XVidC_PixelsPerClock XV_HdmiTxSs1_Config::Ppc

Supported Pixel per Clock.

Referenced by XV_HdmiTxSs1_SetDefaultPpc(), XV_HdmiTxSs1_SetPpc(), and XV_HdmiTxSs1_SetStream().

u8 XV_HdmiTxSs1_Config::VideoInterface

0 - AXI4S 1 - Native 2 - Native DE video interface

Referenced by XV_HdmiTxSs1_SetStream().

XV_HdmiTxSs1_SubCore XV_HdmiTxSs1_Config::Vtc

Sub-core instance configuration.

Referenced by XV_HdmiTxSs1_RegisterDebug(), and XV_HdmiTxSs1_SubcoreInitVtc().